OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 46
OM13006,598
Manufacturer Part Number
OM13006,598
Description
BOARD EVAL EM773 METER EU PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13006,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6681
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NXP Semiconductors
Table 47.
UM10415
User manual
Name
IOCON_PIO1_6
IOCON_PIO1_7
IOCON_SCK_LOC
Register overview: I/O configuration (base address 0x4004 4000)
6.4.1 I/O configuration registers IOCON_PIOn
Table 48.
For details on the I/O configuration settings, see
Port pin
PIO0_0
PIO0_1
PIO0_2
PIO0_3
PIO0_4
PIO0_5
PIO0_6
PIO0_7
PIO0_8
PIO0_9
PIO0_10
PIO1_1
PIO1_2
PIO1_3
PIO1_4
PIO1_5
PIO1_6
PIO1_7
PIO1_8
PIO1_9
PIO1_11
PIO2_0
PIO3_2
PIO3_4
PIO3_5
-
Access
R/W
R/W
R/W
I/O configuration registers ordered by port number
All information provided in this document is subject to legal disclaimers.
Register name
IOCON_RESET_PIO0_0
IOCON_PIO0_1
IOCON_PIO0_2
IOCON_PIO0_3
IOCON_PIO0_4
IOCON_PIO0_5
IOCON_PIO0_6
IOCON_PIO0_7
IOCON_PIO0_8
IOCON_PIO0_9
IOCON_SWCLK_PIO0_10
IOCON_R_PIO1_1
IOCON_R_PIO1_2
IOCON_SWDIO_PIO1_3
IOCON_PIO1_4
IOCON_PIO1_5
IOCON_PIO1_6
IOCON_PIO1_7
IOCON_PIO1_8
IOCON_PIO1_9
IOCON_PIO1_11
IOCON_PIO2_0
IOCON_PIO3_2
IOCON_PIO3_4
IOCON_PIO3_5
IOCON_SCK_LOC
Address
offset
0x0A4
0x0A8
0x0B0
Rev. 1 — 10 September 2010
Description
I/O configuration for pin
PIO1_6/RXD/CT32B0_MAT0
I/O configuration for pin
PIO1_7/TXD/CT32B0_MAT1
SCK pin location select register
Section
Chapter 6: EM773 I/O Configuration
6.3.
Reference
Table 50
Table 51
Table 53
Table 54
Table 55
Table 56
Table 60
Table 61
Table 62
Table 63
Table 64
Table 65
Table 66
Table 67
Table 68
Table 71
Table 72
Table 73
Table 52
Table 57
Table 69
Table 49
Table 70
Table 58
Table 59
Table 74
Reset
value
0xD0
0xD0
0x00
UM10415
© NXP B.V. 2010. All rights reserved.
Reference
Table 72
Table 73
Table 74
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