ADUC7032BSTZ-8L-RL Analog Devices Inc, ADUC7032BSTZ-8L-RL Datasheet - Page 94
![IC,Battery Management,QFP,48PIN,PLASTIC](/photos/6/59/65923/505-48-lqfp_sml.jpg)
ADUC7032BSTZ-8L-RL
Manufacturer Part Number
ADUC7032BSTZ-8L-RL
Description
IC,Battery Management,QFP,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.EVAL-ADUC7032QSPZ.pdf
(116 pages)
Specifications of ADUC7032BSTZ-8L-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
ADuC7032-8L
HANDLING INTERRUPTS FROM THE HIGH
VOLTAGE PERIPHERAL CONTROL INTERFACE
An interrupt controller is also integrated with the high voltage
circuits. If enabled via IRQEN[16], one of five high voltage
sources can assert the high voltage interrupt (IRQ3) signal and
interrupt the MCU core.
While the MCU response to this interrupt event is, as normal, to
vector to the IRQ or FIQ interrupt vector address, the high voltage
interrupt controller simultaneously and automatically loads the
current value of the high voltage status register (HVSTA) into the
HVDAT register. During this time the busy bit, HVCON[0], is set
to indicate the transfer is in progress and clears after 10 μs to
indicate the HVSTA contents are available in HVDAT.
The interrupt handler can, therefore, poll the busy bit in HVCON
until it deasserts and then read the HVDAT register.
Table 78. High Voltage Diagnostics
High Voltage Pin
LIN
WU
Fault Condition
Short between
LIN and VBAT
Short between
LIN and GND
Short between
WU and VBAT
Short between
WU and GND
Open circuit
Method
Drive LIN low
Drive LIN high
Drive WU low
Drive WU high
Enable OC diagnostic resistor with
WU disabled
Rev.0 | Page 94 of 116
At this time, HVDAT holds the value of the HVSTA register.
The status flags can then be interrogated to determine the exact
source of the high voltage interrupt and take appropriate action.
LOW VOLTAGE FLAG (LVF)
The ADuC7032-8L features a low voltage flag (LVF) that, when
enabled, allows the user to monitor REG_DVDD. When
enabled via HVCFG0[2], the low voltage flag can be monitored
through HVMON[3]. If REG_DVDD drops below 2.1 V,
HVMON[3] is cleared. If REG_DVDD drops below 2.1 V,
the RAM contents are corrupted. Once the low voltage flag is
enabled, it is reset only by REG_DVDD dropping below 2.1 V
or the disabling of the LVF functionality using HVCFG0[2].
HIGH VOLTAGE DIAGNOSTICS
It is possible to diagnose fault conditions on the WU and LIN
bus, as detailed in Table 78.
Result
LIN short-circuit interrupt is generated after 20 μs
if more than 100 mA is drawn continuously.
LIN readback low.
Readback high.
WU short-circuit interrupt is generated after 400 μs if more
than 200 mA is sourced.
HVMON[7] is cleared if load is connected; HVMON[7] is set
if WU is open-circuited.