AM79C973BKD\W AMD (ADVANCED MICRO DEVICES), AM79C973BKD\W Datasheet - Page 149

• Manufacturer Part Number: AM79C973BKD\W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKD\W

• Lead Free Status / RoHS Status: Compliant

CSR67: Next Transmit Status
Bit
31-16 RES
15-0
7-0
CSR72: Receive Ring Counter
Bit
31-16 RES
15-0
CSR74: Transmit Ring Counter
Bit
31-16 RES
15-0
NXST
RES
RCVRC
XMTRC
Name
Name
Name
Reserved locations. Written as
zeros and read as undefined.
Next Transmit Status. This field is
a copy of bits 31-16 of TMD1 of
the next transmit descriptor.
Reserved locations. Read and
written as zeros. Accessible only
when either the STOP or the
SPND bit is set.
Reserved locations. Written as
zeros and read as undefined.
Receive Ring Counter location.
Contains a two’s complement bi-
nary number used to number the
current receive descriptor. This
counter interprets the value in
CSR76 as pointing to the first de-
scriptor. A counter value of zero
corresponds to the last descriptor
in the ring.
Reserved locations. Written as
zeros and read as undefined.
Transmit Ring Counter location.
Contains a two’s complement bi-
nary number used to number the
current transmit descriptor. This
counter interprets the value in
CSR78 as pointing to the first de-
scriptor. A counter value of zero
corresponds to the last descriptor
in the ring.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
Description
Description
P R E L I M I N A R Y
Am79C973/Am79C975
CSR76: Receive Ring Length
Bit
31-16 RES
15-0
CSR78: Transmit Ring Length
Bit
31-16 RES
15-0
RCVRL
XMTRL
Name
Name
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Reserved locations. Written as
zeros and read as undefined.
Receive Ring Length. Contains
the two’s complement of the re-
ceive descriptor ring length. This
register is initialized during the
Am79C973/Am79C975 controller
initialization routine based on the
value in the RLEN field of the ini-
tialization block. However, this
register can be manually altered.
The actual receive ring length is
defined by the current value in
this register. The ring length can
be defined as any value from 1 to
65535.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Reserved locations. Written as
zeros and read as undefined.
Transmit Ring Length. Contains
the two’s complement of the
transmit descriptor ring length.
This register is initialized during
the
Am79C975Am79C973/
Am79C975 controller initializa-
tion routine based on the value in
the TLEN field of the initialization
block. However, this register can
be manually altered. The actual
transmit ring length is defined by
the current value in this register.
The ring length can be defined as
any value from 1 to 65535.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
Description
Description
Am79C973/
149