AM79C973BKD\W AMD (ADVANCED MICRO DEVICES), AM79C973BKD\W Datasheet - Page 210

• Manufacturer Part Number: AM79C973BKD\W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKD\W

• Lead Free Status / RoHS Status: Compliant

29
28
210
MORE/LTINT Bit
ADD_FCS
MORE
LTINT
and, therefore, may be set in any
descriptor of a chained buffer
transmission.
ADD_FCS dynamically controls
the generation of FCS on a frame
by frame basis. This bit should be
set with the ENP bit. However, for
backward compatibility, it is rec-
ommended that this bit be set for
every descriptor of the intended
frame. When ADD_FCS is set,
the state of DXMTFCS is ignored
and transmitter FCS generation is
activated. When ADD_FCS is
cleared to 0, FCS generation is
controlled by DXMTFCS. When
APAD_XMT (CSR4, bit 11) is set
to 1, the setting of ADD_FCS has
no effect on frames shorter than
64 bytes. ADD_FCS is set by the
host, and is not changed by the
Am79C973/Am79C975
ler. This is a reserved bit in the C-
LANCE (Am79C90) controller.
MORE. The value of MORE is
written
Am79C975 controller and is read
by the host. When LTINTEN is
cleared to 0 (CSR5, bit 14), the
Am79C973/Am79C975 controller
will never look at the contents of
bit 28, write operations by the
host have no effect. When LTINT-
EN is set to 1 bit 28 changes its
function to LTINT on host write
operations and on Am79C973/
Am79C975 controller read opera-
tions.
MORE indicates that more than
one retry was needed to transmit
a frame. The value of MORE is
written
Am79C975 controller. This bit
has meaning only if the ENP bit is
set.
LTINT is used to suppress inter-
rupts after successful transmis-
sion on selected frames. When
LTINT is cleared to 0 and ENP is
set
Am79C975 controller will not set
TINT (CSR0, bit 9) after a suc-
cessful transmission. TINT will
28
to
by
by
always
1,
the
the
the
functions
Am79C973/
Am79C973/
Am79C973/
P R E L I M I N A R Y
Am79C973/Am79C975
control-
as
27
26
25
24
23
ONE
DEF
STP
ENP
BPE
only be set when the last descrip-
tor of a frame has both LTINT and
ENP set to 1. When LTINT is
cleared to 0, it will only cause the
suppression of interrupts for suc-
cessful transmission. TINT will al-
ways be set if the transmission
has an error. The LTINTEN over-
rides the function of TOKINTD
(CSR5, bit 15).
ONE indicates that exactly one
retry was needed to transmit a
frame. ONE flag is not valid when
LCOL is set. The value of the
ONE
Am79C973/Am79C975
ler. This bit has meaning only if
the ENP bit is set.
Deferred
Am79C973/Am79C975 controller
had to defer while trying to trans-
mit a frame. This condition occurs
if the channel is busy when the
Am79C973/Am79C975 controller
is ready to transmit. DEF is set by
the Am79C973/Am79C975 con-
troller and cleared by the host.
Start of Packet indicates that this
is the first buffer to be used by the
Am79C973/Am79C975 controller
for this frame. It is used for data
chaining buffers. The STP bit
must be set in the first buffer of
the frame, or the Am79C973/
Am79C975 controller will skip
over the descriptor and poll the
next descriptor(s) until the OWN
and STP bits are set. STP is set
by the host and is not changed by
the Am79C973/Am79C975 con-
troller.
End of Packet indicates that this
is the last buffer to be used by the
Am79C973/Am79C975 controller
for this frame. It is used for data
chaining buffers. If both STP and
ENP are set, the frame fits into
one buffer and there is no data
chaining. ENP is set by the host
and is not changed by the
Am79C973/Am79C975
ler.
Bus Parity Error is set by the
Am79C973/Am79C975 controller
bit
indicates
is
written
that
by
control-
control-
the
the