AM79C973BKD\W AMD (ADVANCED MICRO DEVICES), AM79C973BKD\W Datasheet - Page 91

• Manufacturer Part Number: AM79C973BKD\W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKD\W

• Lead Free Status / RoHS Status: Compliant

pansion ROM data are stored in holding registers. One
clock cycle after the last data byte is available, the
Am79C973/Am79C975 controller asserts TRDY.
The access time for the Expansion ROM or the EB-
DATA (BCR30) device (t
can be calculated by subtracting the clock to output
The access time for the Expansion ROM or for the EB-
DATA (BCR30) device (t
can be calculated by subtracting the clock to output
delay for the EBUA EBA[7:0] outputs (t
adding the input to clock setup time for Flash/EPRO in-
puts (t
t
(t
The timing diagram in Figure 43 assumes the default
programming of ROMTMG (1001b = 9 CLK). After
ACC
s_D
)
= ROMTMG * CLK period * CLK_FAC - (t
s_D
) from the time defined by ROMTMG:
Am79C973
ACC)
ACC
Figure 40. Flash Configuration for the Expansion Bus
EBUA_EBA[7:0]
) during read operations
during write operations
EBDA[15:8]
AS_/EBOE
EROMCS
EBD[7:0]
EBWE
v_A_D
P R E L I M I N A R Y
Am79C973/Am79C975
) and by
v_A_D
) -
delay for the EBUA_EBA[7:0] outputs (t
subtracting the input to clock setup time for the
EBD[7:0] inputs (t
ROMTMG:
t
(t
reading the first byte, the Am79C973/Am79C975 con-
troller reads in three more bytes by incrementing the
lower portion of the ROM address. After the last byte is
strobed in, TRDY will be asserted on clock 50. When
the host tries to perform a burst read of the Expansion
ROM, the Am79C973/Am79C975 controller will dis-
connect the access at the second data phase.
The host must program the Expansion ROM Base Ad-
dress register in the PCI configuration space before the
first access to the Expansion ROM. The Am79C973/
ACC
D-FF
s_D
'374
)
= ROMTMG * CLK period *CLK_FAC - (t
s_D
) from the time defined by
A[23:16]
A[15:8]
A[7:0]
WE
DQ[7:0]
CS
OE
FLASH
v_A_D
21510D-45
) and by
v_A_D
91
) -