NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 17

• Manufacturer Part Number: NH82810 S L7XK
• Manufacturer: Intel

Specifications of NH82810 S L7XK

• Lead Free Status / RoHS Status: Compliant

2.
Datasheet
R
Signal Description
This section provides a detailed description of the GMCH signals. The signals are arranged in functional
groups according to their associated interface. The states of all of the signals during reset are provided in
the System Reset section.
The “#” symbol at the end of a signal name indicates that the active, or asserted state occurs when the
signal is at a low voltage level. When “#” is not present after the signal name the signal is asserted when
at the high voltage level.
The following notations are used to describe the signal type:
The signal description also includes the type of buffer used for the particular signal:
Note that the processor address and data bus signals (Host Interface) are logically inverted signals (i.e.,
the actual values are inverted of what appears on the processor bus). This must be taken into account and
the addresses and data bus signals must be inverted inside the GMCH. All processor control signals
follow normal convention. A 0 indicates an active level (low voltage) if the signal is followed by #
symbol and a 1 indicates an active level (high voltage) if the signal has no # suffix.
I
O
I/OD
I/O
AGTL+
CMOS
LVTTL
1.8V
Analog
Open Drain AGTL+ interface signal. Refer to the AGTL+ I/O Specification for
complete details
The CMOS buffers are Low Voltage TTL compatible signals. These are 3.3V only.
Analog CRT Signals
Low Voltage TTL compatible signals. There are 3.3V only.
1.8V signals for the digital video interface
Input pin
Output pin
Input / Open Drain Output pin. This pin requires a pullup to the VCC of the processor
core
Bi-directional Input/Output pin
Intel
®
82810E (GMCH)
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