NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 22

• Manufacturer Part Number: NH82810 S L7XK
• Manufacturer: Intel

Specifications of NH82810 S L7XK

• Lead Free Status / RoHS Status: Compliant

Intel
2.6.
22
®
82810E (GMCH)
Digital Video Output Signals/TV-Out Pins
TVCLKIN/INT#
CLKOUT[1:0]
BLANK#
LTVDATA[11:0]
TVVSYNC
TVHSYNC
LTVCL
LTVDA
Signal Name
I
1.8V
O
1.8V
O
1.8V
O
1.8V
O
1.8V
O
1.8V
I/OD
CMOS
I/OD
CMOS
Type
Low Voltage TV Clock In (TV-Out Mode): In 1.8V TV-Out usage, the
TVCLKIN pin functions as a pixel clock input to the GMCH from the TV
encoder. The TVCLKIN frequency ranges from 20 MHz to 40 MHz
depending on the mode (e.g., NTSC or PAL) and the overscan
compensation values in the TV Encoder. CLKIN has a worse case duty
cycle of 60%/40% coming in to the GMCH.
Flat Panel Interrupt (LCD Mode): In Flat Panel usage, the INT# pin is
asserted to cause an interrupt (typically, to indicate a hot plug or unplug of
a flat panel). In Flat Panel usage, this pin is connected internally to a pull-
up resistor.
LCD/TV Port Clock Out: These pins provide a differential pair reference
clock that can run up to 85 MHz.
Flicker Blank or Border Period Indication: BLANK# is a programmable
output pin driven by the graphics control. When programmed as a blank
period indication, this pin indicates active pixels excluding the border. When
programmed as a border period indication, this pin indicates active pixel
including the border pixels.
LCD/TV Data: These signals are used to interface to the LCD/TV-out data
bus.
Vertical Sync: VSYNC signal for the LTV interface. The active polarity of
the signal is programmable.
Horizontal Sync: HSYNC signal for the LTV interface. The active polarity
of the signal is programmable.
LCD/TV Clock: Clock pin for 2-wire interface.
LCD/TV Data: Data pin for 2-wire interface.
Description
Datasheet
R