Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 130

IC 6MHZ Z80 CMOS CTC 28-PDIP

Z84C3006PEG

Manufacturer Part Number
Z84C3006PEG
Description
IC 6MHZ Z80 CMOS CTC 28-PDIP
Manufacturer
Zilog
Type
Counter/Timer Circuit (CTC)r
Series
Z80r
Datasheets

Specifications of Z84C3006PEG

Frequency
6MHz
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 100°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z84C3xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
6 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Filter Terminals
SMD
Ic Generic Number
84C30
Operating Temperature Min
-40°C
Operating Temperature Max
100°C
Clock Frequency
6MHz
Rohs Compliant
Yes
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
28
Supply Voltage Range
5V
Operating Temperature Range
-40°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
 Details
Other names
269-3910
Z84C3006PEG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z84C3006PEG
Manufacturer:
ZILOG
Quantity:
1 980
Part Number:
Z84C3006PEG
Manufacturer:
Zilog
Quantity:
1 722
Part Number:
Z84C3006PEG
Manufacturer:
ZILOG
Quantity:
1 980
Part Number:
Z84C3006PEG
Manufacturer:
WSI
Quantity:
4 970
Part Number:
Z84C3006PEG
Manufacturer:
ZILOG
Quantity:
20 000
110
Operation:
Op Code:
Operands:
Description: The low order byte of register pair dd is loaded to memory address (
Condition Bits Affected: None
Example:
UM008005-0205
Z80 CPU
User’s Manual
(nn+1) ← ddh, (nn) ← ddl
LD
(nn), dd
upper byte is loaded to memory address (
either BC, DE, HL, or SP, assembled as follows in the object code:
The first
memory address.
If register pair BC contains the number
(
memory location
1000H
1
0
1
1
), BC results in
M Cycles
n
operand after the Op Code is the low order byte of a two byte
Pair
1
d
BC
DE
HL
SP
6
0
d
n
n
1001H
LD (nn), dd
1
0
44H
20 (4, 4, 3, 3, 3, 3)
.
1
0
T States
in memory location
0
1
dd
00
01
10
11
1
1
4644H
ED
nn
+1). Register pair dd defines
4 MHz E.T.
, the instruction
1000H
5.00
Z80 Instruction Set
, and
46H
LD
in
nn
); the

Related parts for Z84C3006PEG