Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 283

• Manufacturer Part Number: Z84C3006PEG
• Description: IC 6MHZ Z80 CMOS CTC 28-PDIP
• Manufacturer: Zilog
• Type: Counter/Timer Circuit (CTC)r
• Series: Z80r

Specifications of Z84C3006PEG

• Frequency: 6MHz
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 8mA
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Processor Series: Z84C3xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 6 MHz
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Filter Terminals: SMD
• Ic Generic Number: 84C30
• Operating Temperature Min: -40°C
• Operating Temperature Max: 100°C
• Clock Frequency: 6MHz
• Rohs Compliant: Yes
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 28
• Supply Voltage Range: 5V
• Operating Temperature Range: -40°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Count: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3910; Z84C3006PEG

Operation:
Op Code:
Description: This instruction is used at the end of a maskable interrupt service routine to:
Condition Bits Affected: None
Example:
UM008005-0205
Return from Interrupt
RETI
•
•
Given: Two interrupting devices, with A and B connected in a daisy-chain
configuration and A having a higher priority than B.
+
1
INT
0
Restore the contents of the Program Counter (PC) (analogous to the
RET instruction)
Signal an I/O device that the interrupt routine is completed. The
instruction also facilitates the nesting of interrupts, allowing higher
priority devices to temporarily suspend service of lower priority
service routines. However, this instruction does not enable interrupts
that were disabled when the interrupt routine was entered. Before
doing the
should be executed to allow recognition of interrupts after completion
of the current service routine.
IEI
1
1
M Cycles
A
1
0
4
RETI
IEO
0
0
instruction, the enable interrupt instruction (
1
1
RETI
14 (4, 4, 3, 3)
1
1
T States
IEI
0
0
B
1
1
IEO
ED
4D
4 MHz E.T.
3.50
Z80 Instruction Set
User’s Manual
Z80 CPU
EI
)
RETI
263