Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 50
![IC 6MHZ Z80 CMOS CTC 28-PDIP](/photos/6/57/65755/269-28-dip_sml.jpg)
Z84C3006PEG
Manufacturer Part Number
Z84C3006PEG
Description
IC 6MHZ Z80 CMOS CTC 28-PDIP
Manufacturer
Zilog
Type
Counter/Timer Circuit (CTC)r
Series
Z80r
Specifications of Z84C3006PEG
Frequency
6MHz
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 100°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z84C3xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
6 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Filter Terminals
SMD
Ic Generic Number
84C30
Operating Temperature Min
-40°C
Operating Temperature Max
100°C
Clock Frequency
6MHz
Rohs Compliant
Yes
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
28
Supply Voltage Range
5V
Operating Temperature Range
-40°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
Details
Other names
269-3910
Z84C3006PEG
Z84C3006PEG
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30
UM008005-0205
Z80 CPU
User’s Manual
Memory Speed Control
Slow memories can reduce costs for many applications. The WAIT line on
the CPU allows the Z80 to operate with any speed memory. Memory access
time requirements, which are covered in Chapter A3, are most severe
during the M1 cycle instruction fetch. All other memory access cycles
complete in an additional one half clock cycle. Hence, it is sometimes
appropriate to add one wait state to the M1 cycle so slower memories can
be used. Figure 19 is an example of a simple circuit that accomplishes this
objective. This circuit can be changed to add a single wait state to any
memory access as indicated in Figure 20.
Figure 19. Adding One Wait State to an M1 Cycle
CLK
M1
D
C
7474
+5V
S
R
Q
Q
D
C
7474
+5V
+5V
Hardware and Software Implementation Examples
S
R
Q
Q
WAIT
WAIT
CLK
M1
T
1
T
2
M1
T
W
T
3
T
4
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