Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 97

IC 6MHZ Z80 CMOS CTC 28-PDIP

Z84C3006PEG

Manufacturer Part Number
Z84C3006PEG
Description
IC 6MHZ Z80 CMOS CTC 28-PDIP
Manufacturer
Zilog
Type
Counter/Timer Circuit (CTC)r
Series
Z80r
Datasheets

Specifications of Z84C3006PEG

Frequency
6MHz
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 100°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z84C3xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
6 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Filter Terminals
SMD
Ic Generic Number
84C30
Operating Temperature Min
-40°C
Operating Temperature Max
100°C
Clock Frequency
6MHz
Rohs Compliant
Yes
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
28
Supply Voltage Range
5V
Operating Temperature Range
-40°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
 Details
Other names
269-3910
Z84C3006PEG

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UM008005-0205
Add/Subtract Flag
for extended precision arithmetic. Also, the
Flag if the conditions for making the decimal adjustment are met.
For instructions
between the least significant byte (LSB) and most significant byte (MSB)
for any register or memory location. During instructions
SLA
or memory location. During instructions
Carry contains the last value shifted out of Bit
memory location.
For the logical instructions
The Carry Flag can also be set by the Set Carry Flag (
complemented by the Compliment Carry Flag (
The Add/Subtract Flag (N) is used by the
Accumulator
instructions. For
N is set to 1.
Add/Subtract Flag
The
distinguish between
instructions, N sets to 0. For all
Parity/Overflow Flag (P/V)
This flag is set to a specific state depending on the operation performed.
For arithmetic operations, this flag indicates an Overflow condition when
the result in the Accumulator is greater than the maximum possible number
, the Carry contains the last value shifted out of Bit 7 of any register
Decimal Adjust Accumulator
instruction (DAA) to distinguish between
RLA
ADD
ADD
,
instructions, N is cleared to 0. For SUB instructions,
RRA
and
,
AND
RLS
SUBTRACT
,
SUBTRACT
, and
OR
, and
RRS
instruction (
XOR
instructions. For all
RRCA
Decimal Adjust
, the Carry bit is used as a link
instructions, N sets to 1.
DAA
, the Carry is reset.
,
CCF
0
RRC
instruction sets the Carry
of any register or
) instructions.
DAA
,
SCF
SRA
Z80 Instruction Set
) uses this flag to
User’s Manual
) and
RLCA
ADD
, and
ADD
and
Z80 CPU
,
SRL
RLC
SUB
, the
, and
77

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