Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 70
Z84C3006PEG
Manufacturer Part Number
Z84C3006PEG
Description
IC 6MHZ Z80 CMOS CTC 28-PDIP
Manufacturer
Zilog
Type
Counter/Timer Circuit (CTC)r
Series
Z80r
Specifications of Z84C3006PEG
Frequency
6MHz
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 100°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z84C3xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
6 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Filter Terminals
SMD
Ic Generic Number
84C30
Operating Temperature Min
-40°C
Operating Temperature Max
100°C
Clock Frequency
6MHz
Rohs Compliant
Yes
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
28
Supply Voltage Range
5V
Operating Temperature Range
-40°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
Details
Other names
269-3910
Z84C3006PEG
Z84C3006PEG
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UM008005-0205
Z80 CPU
User’s Manual
Table 6 defines the Op Code for all the 8-bit load instructions
implemented in the Z80 CPU. Also described in this table is the type of
addressing used for each instruction. The source of the data is found on
the top horizontal row and the destination is specified in the left column.
For example, load register C from register B uses the Op Code
the figures, the Op Code is specified in hexadecimal notation and the
(
memory during M1 time, decoded, and then the register transfer is
automatically performed by the CPU.
The assembly language mnemonic for this entire group is LD, followed
by the destination, followed by the source (LD DEST, SOURCE). Note
that several combinations of addressing modes are possible. For example,
the source may use register addressing and the destination may be register
indirect; such as load the memory location pointed to by register HL with
the contents of register D. The Op Code for this operation is
mnemonic for this load instruction is
The parentheses around the HL indicates that the contents of HL are used
as a pointer to a memory location. In all Z80 load instruction mnemonics,
the destination is always listed first, with the source following. The Z80
assembly language is defined for ease of programming. Every instruction
is self documenting and programs written in Z80 language are easy to
maintain.
In Table 6, some Op Codes that are available in the Z80 use two bytes.
This feature is an efficient method of memory utilization because 8-, 18-,
24-, or 32-bit instructions are implemented in the Z80. Often utilized
instructions such as arithmetic or logical operations are only eight bits,
which results in better memory utilization than is achieved with fixed
instruction sizes such as 16 bits.
0100 1000
binary) code is fetched by the CPU from the external
LD
Z80 CPU Instruction Description
(
HL
),
D
.
72
48H
. The
. In all
48H
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