LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 106

• Manufacturer Part Number: LAN9118MT
• Manufacturer: Standard Microsystems (SMSC)

Revision 1.0 (03-17-05)
6.3.15
31-30
28-16
BITS
15-0
29
DESCRIPTION
Reserved
GP Timer Enable (TIMER_EN). When a one is written to this bit the GP
Timer is put into the run state. When cleared, the GP Timer is halted. On
the 1 to 0 transition of this bit the GPT_LOAD field will be preset to FFFFh.
Reserved
General Purpose Timer Pre-Load (GPT_LOAD). This value is pre-loaded
into the GP-Timer.
GPT_CFG-General Purpose Timer Configuration Register
This register configures the General Purpose timer. The GP Timer can be configured to generate host
interrupts at intervals defined in this register.
Offset:
8Ch
DATASHEET
106
High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Size:
32 bits
TYPE
R/W
R/W
RO
RO
SMSC LAN9118
DEFAULT
FFFFh
Datasheet
0
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