LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 54

• Manufacturer Part Number: LAN9118MT
• Manufacturer: Standard Microsystems (SMSC)

Revision 1.0 (03-17-05)
4.12.1
TX Buffer Format
TX buffers exist in the host’s memory in a given format. The host writes a TX command word into the
TX data buffer before moving the Ethernet packet data. The TX command A and command B are 32-
bit values that are used by the LAN9118 in the handling and processing of the associated Ethernet
packet data buffer. Buffer alignment, segmentation and other packet processing parameters are
included in the command structure. The following diagram illustrates the buffer format.
Note 4.14 Figure 4.13, "TX Buffer Format", shows the TX Buffer as it is written into the LAN9118. It
should be noted that not all of the data shown in this diagram is actually stored in the TX
data FIFO. This must be taken into account when calculating the actual TX data FIFO
usage. Please refer to
page 60
for a detailed explanation on calculating the actual TX data FIFO usage.
Host Write
Order
2nd
3rd
Last
1st
Figure 4.13 TX Buffer Format
31
DATASHEET
Offset + Data DWORD0
Optional offset DWORD0
Optional offset DWORDn
Optional Pad DWORDn
Optional Pad DWORD0
Section 4.12.5, "Calculating Actual TX Data FIFO Usage," on
TX Command 'B'
TX Command 'A'
Last Data & PAD
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High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
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SMSC LAN9118
Datasheet