LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 88

• Manufacturer Part Number: LAN9118MT
• Manufacturer: Standard Microsystems (SMSC)

Revision 1.0 (03-17-05)
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Reserved
TX Data FIFO Underrun Interrupt (TDFU).
FIFO underruns.
TX Data FIFO Overrun Interrupt (TDFO).
is full, and another write is attempted.
TX Data FIFO Available Interrupt (TDFA).
FIFO available space is greater than the programmed level.
TX Status FIFO Full Interrupt (TSFF).
is full.
TX Status FIFO Level Interrupt (TSFL).
reaches the programmed level.
RX Dropped Frame Interrupt (RXDF_INT).
whenever a receive frame is dropped.
RX Data FIFO Level Interrupt (RDFL).
reaches the programmed level.
RX Status FIFO Full Interrupt (RSFF).
is full.
RX Status FIFO Level Interrupt (RSFL).
FIFO reaches the programmed level.
GPIO [2:0] (GPIOx_INT).
interrupts are configured through the GPIO_CFG register.
Interrupts are generated from the GPIO’s. These
DATASHEET
Generated when the TX Status FIFO
Generated when the RX Status FIFO
Generated when the TX Status FIFO
Generated when the RX FIFO
Generated when the TX data FIFO
Generated when the RX Status
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High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Generated when the TX data
Generated when the TX data
This interrupt is issued
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SMSC LAN9118
Datasheet
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