LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 126
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LAN9118MT
Manufacturer Part Number
LAN9118MT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9118MT.pdf
(170 pages)
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Revision 1.0 (03-17-05)
6.4.4
BITS
31-0
Upper 32 bits of the 64-bit Hash Table
HASHH—Multicast Hash Table High Register
The 64-bit Multicast table is used for group address filtering. For hash filtering, the contents of the
destination address in the incoming frame is used to index the contents of the Hash table. The most
significant bit determines the register to be used (Hi/Low), while the other five bits determine the bit
within the register. A value of 00000 selects Bit 0 of the Multicast Hash Table Lo register and a value
of 11111 selects the Bit 31 of the Multicast Hash Table Hi register.
If the corresponding bit is 1, then the multicast frame is accepted. Otherwise, it is rejected. If the “Pass All
Multicast” (MCPAS) bit is set (1), then all multicast frames are accepted regardless of the multicast hash
values.
The Multicast Hash Table Hi register contains the higher 32 bits of the hash table and the Multicast
Hash Table Low register contains the lower 32 bits of the hash table.
Offset:
Default Value:
4
00000000h
DATASHEET
126
DESCRIPTION
High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Attribute:
Size:
R/W
32 bits
SMSC LAN9118
Datasheet
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