LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 22

• Manufacturer Part Number: LAN9118MT
• Manufacturer: Standard Microsystems (SMSC)

Revision 1.0 (03-17-05)
100,99
NO.
PIN
,98
10
9
Duplex Indicator
Activity Indicator),
General Purpose
nLED1 (Speed
nLED2 (Link &
nLED3 (Full-
Indicator),
I/O data,
Test Pin
RBIAS
NAME
).
Table 2.6 System and Power Signals (cont.)
GPIO[2:0]/
SYMBOL
LED[3:1]
ATEST
RBIAS
DATASHEET
BUFFER
IS/O12/
TYPE
OD12
22
High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
AI
I
NUM
PINS
1
1
3
General Purpose I/O data: These
three general-purpose signals are fully
programmable as either push-pull
output, open-drain output or input by
writing the GPIO_CFG configuration
register in the CSR’s. They are also
multiplexed as GP LED connections.
GPIO signals are Schmitt-triggered
inputs. When configured as LED
outputs these signals are open-drain.
nLED1 (Speed Indicator). This signal
is driven low when the operating
speed is 100Mbs, or during auto-
negotiation. This signal is driven high
during 10Mbs operation, or during line
isolation.
nLED2 (Link & Activity Indicator).
This signal is driven low (LED on)
when the LAN9118 detects a valid
link. This signal is pulsed high (LED
off) for 80mS whenever transmit or
receive activity is detected. This signal
is then driven low again for a
minimum of 80mS, after which time it
will repeat the process if TX or RX
activity is detected. Effectively, LED2
is activated solid for a link. When
transmit or receive activity is sensed
LED2 will flash as an activity indicator.
nLED3 (Full-Duplex Indicator). This
signal is driven low when the link is
operating in full-duplex mode.
PLL Bias: Connect to an external
12.0K ohm 1.0% resistor to ground.
Used for the PLL Bias circuit.
This pin must be connected to VDD
for normal operation.
DESCRIPTION
SMSC LAN9118
Datasheet