LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 117

• Manufacturer Part Number: LAN9118MT
• Manufacturer: Standard Microsystems (SMSC)

High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9118
BITS
7-0
9
8
DESCRIPTION
EPC Time-out.
response from the EEPROM within 30mS, the EEPROM controller will time-
out and return to its idle state. This bit is set when a time-out occurs
indicating that the last operation was unsuccessful.
NOTE: If the EEDIO signal pin is externally pulled-high, EPC commands will
not time out if the EEPROM device is missing. In this case the EPC Busy
bit will be cleared as soon as the command sequence is complete. It should
also be noted that the ERASE, ERAL, WRITE and WRAL commands are
the only EPC commands that will time-out if an EEPROM device is not
present -and- the EEDIO signal is pulled low
MAC Address Loaded.
was found, and that the MAC address programming has completed
normally. This bit is set after a successful load of the MAC address after
power-up, or after a RELOAD command has completed
EPC Address.
Controller to address the specific memory location in the Serial EEPROM.
This is a Byte aligned address.
The 8-bit value in this field is used by the EEPROM
If an EEPROM operation is performed, and there is no
When set, this bit indicates that a valid EEPROM
DATASHEET
117
R/WC
TYPE
R/W
RO
Revision 1.0 (03-17-05)
DEFAULT
00h
0
-