LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 81

• Manufacturer Part Number: LAN9118MT
• Manufacturer: Standard Microsystems (SMSC)

High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9118
6.2.2
TX FIFO Ports
The TX data Path consists of two FIFOs, the TX status and data. The TX Status FIFO can be read
from two locations. The TX Status FIFO Port will perform a destructive read, thus “Popping” the data
from the TX Status FIFO. There is also the TX Status FIFO PEEK location. This location allows a non-
destructive read of the top (oldest) location of the FIFO.
The TX data FIFO is Write Only. It is aliased in 8 DWORD locations (16 WORD locations in 16-bit
mode) from the 20h offset to 3Ch offset. The host may write to any of the 8(16) locations since they
all access the same TX data FIFO location and perform the same function.
DATASHEET
81
Revision 1.0 (03-17-05)