MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 11

• Manufacturer Part Number: MOD5272-100IR
• Description: PROCESSOR MODULE FLASH MOD5272
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5272-100IR

• Module/board Type: Processor Module
• Ethernet Connection Type: 10/100 Ethernet Port RJ-45
• Operating Voltage: 3.3 V
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MOD5272
• For Use With: 528-1001 - KIT DEVELOP NETWORK FOR MOD5272
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 528-1008

MOTOROLA
11.4.8.1
11.4.8.2
11.5
11.5.1
11.5.2
11.5.3
11.5.4
11.5.5
11.5.6
11.5.7
11.5.8
11.5.9
11.5.10
11.5.11
11.5.12
11.5.13
11.5.14
11.5.15
11.5.16
11.5.16.1
11.5.17
11.5.18
11.5.19
11.5.20
11.5.21
11.5.22
11.5.22.1
11.5.23
11.5.24
11.5.24.1
11.6
11.6.1
11.6.1.1
11.6.1.2
11.7
12.1
12.2
12.2.1
Paragraph
Number
Programming Model ....................................................................................... 11-11
Buffer Descriptors........................................................................................... 11-32
Differences between MCF5272 FEC and MPC860T FEC............................. 11-36
Introduction....................................................................................................... 12-1
Module Operation ............................................................................................. 12-3
Ethernet Control Register (ECR)................................................................ 11-12
Interrupt Event Register (EIR).................................................................... 11-12
Interrupt Mask Register (EIMR)................................................................. 11-13
Interrupt Vector Status Register (IVSR)..................................................... 11-14
Receive Descriptor Active Register (RDAR)............................................. 11-15
Transmit Descriptor Active Register (TDAR)............................................ 11-16
MII Management Frame Register (MMFR) ............................................... 11-17
MII Speed Control Register (MSCR) ......................................................... 11-18
FIFO Receive Bound Register (FRBR) ...................................................... 11-19
FIFO Receive Start Register (FRSR).......................................................... 11-20
Transmit FIFO Watermark (TFWR)........................................................... 11-21
FIFO Transmit Start Register (TFSR) ........................................................ 11-22
Receive Control Register (RCR) ................................................................ 11-22
Maximum Frame Length Register (MFLR) ............................................... 11-23
Transmit Control Register (TCR) ............................................................... 11-24
RAM Perfect Match Address Low (MALR) .............................................. 11-25
Hash Table High (HTUR)........................................................................... 11-27
Hash Table Low (HTLR)............................................................................ 11-27
Pointer-to-Receive Descriptor Ring (ERDSR) ........................................... 11-28
Pointer-to-Transmit Descriptor Ring (ETDSR).......................................... 11-28
Receive Buffer Size Register (EMRBR) .................................................... 11-29
Initialization Sequence................................................................................ 11-30
User Initialization (Prior to Asserting ETHER_EN) .................................. 11-30
FEC Initialization........................................................................................ 11-31
FEC Buffer Descriptor Tables .................................................................... 11-32
USB Module Architecture ............................................................................ 12-3
Transmission Errors................................................................................ 11-10
Reception Errors ..................................................................................... 11-10
RAM Perfect Match Address High (MAUR) ......................................... 11-26
Hardware Initialization ........................................................................... 11-30
User Initialization (after setting ETHER_EN) ....................................... 11-31
Ethernet Receive Buffer Descriptor (RxBD).......................................... 11-33
Ethernet Transmit Buffer Descriptor ...................................................... 11-34
Universal Serial Bus (USB)
CONTENTS
Chapter 12
Contents
Title
Number
Page
xi