MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 85

• Manufacturer Part Number: MOD5272-100IR
• Description: PROCESSOR MODULE FLASH MOD5272
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5272-100IR

• Module/board Type: Processor Module
• Ethernet Connection Type: 10/100 Ethernet Port RJ-45
• Operating Voltage: 3.3 V
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MOD5272
• For Use With: 528-1001 - KIT DEVELOP NETWORK FOR MOD5272
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 528-1008

CMPA
CMPI
DIVS
DIVU
EOR
EORI
EXT
EXTB
HALT
JMP
JSR
LEA
LINK
LSL
LSR
MAC
MACL
MOVE
MOVE from
MAC
MOVE to
MAC
MOVE from
CCR
MOVE to
CCR
Instruction
MOTOROLA
1
<ea>y,Dx
<ea>y,Dx
<ea-1>y,Dx
<ea>y,Dx
<ea-1>y,Dx
Dy,<ea>x
Dy,<ea>x
#<data>,Dx
#<data>,Dx
Dx
None
<ea-3>y
<ea-3>y
<ea-3>y,Ax
Ax,#<d16>
Dy,Dx
#<data>,Dx
Dy,Dx
#<data>,Dx
Ry,RxSF
Ry,RxSF,<ea-1>y,Rw
<ea>y,<ea>x
MASK,Rx
ACC,Rx
MACSR,Rx
MACSR,CCR
Ry,ACC
Ry,MACSR
Ry,MASK
#<data>,ACC
#<data>,MACSR
#<data>,MASK
CCR,Dx
Dy,CCR
#<data>,CCR
Operand Syntax
Table 2-7. User-Mode Instruction Set Summary (Continued)
.L
.L
.W
.L
.W
.L
.L
.L
.B →.W
.W →.L
.B →.L
Unsized
Unsized
Unsized
.L
.W
.L
.L
.L
.L
.L + (.W × .W) → .L
.L + (.L × .L) → .L
.L + (.W × .W) → .L, .L
.L + (.L × .L) → .L, .L
.B,.W,.L
.L
.L
.L
.L
.W
.B
Operand Size
Chapter 2. ColdFire Core
Destination – source
Destination – immediate data
Dx /<ea>y → Dx {16-bit remainder; 16-bit quotient}
Dx /<ea>y → Dx {32-bit quotient}
Signed operation
Dx /<ea>y → Dx {16-bit remainder; 16-bit quotient}
Dx /<ea>y → Dx {32-bit quotient}
Unsigned operation
Source ^ destination → destination
Immediate data ^ destination → destination
Sign-extended destination → destination
Sign-extended destination → destination
Enter halted state
Address of <ea> → PC
SP – 4 → SP; next sequential PC → (SP); <ea> → PC
<ea> → Ax
SP – 4 → SP; Ax → (SP); SP → Ax; SP + d16 → SP
X/C ← (Dx << Dy) ← 0
X/C ← (Dx << #<data>) ← 0
0 → (Dx >> Dy) → X/C
0 → (Dx >> #<data>) → X/C
ACC + (Ry × Rx){<< 1 | >> 1} → ACC
ACC + (Ry × Rx){<< 1 | >> 1} → ACC; (<ea>y{&MASK}) →
Rw
ACC + (Ry × Rx){<< 1 | >> 1} → ACC
ACC + (Ry × Rx){<< 1 | >> 1} → ACC; (<ea-1>y{&MASK})
→ Rw
<ea>y → <ea>x
Rm → Rx
MACSR → CCR
Ry → Rm
#<data> → Rm
CCR → Dx
Dy → CCR
#<data> → CCR
Operation
Instruction Set Summary
2-17