MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 189
![PROCESSOR MODULE FLASH MOD5272](/photos/6/75/67555/mod5272-100ir_sml.jpg)
MOD5272-100IR
Manufacturer Part Number
MOD5272-100IR
Description
PROCESSOR MODULE FLASH MOD5272
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(2 pages)
2.MOD5272-100IR.pdf
(3 pages)
3.MOD5272-100IR.pdf
(550 pages)
Specifications of MOD5272-100IR
Module/board Type
Processor Module
Ethernet Connection Type
10/100 Ethernet Port RJ-45
Operating Voltage
3.3 V
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MOD5272
For Use With
528-1001 - KIT DEVELOP NETWORK FOR MOD5272
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
528-1008
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MOTOROLA
Chapter 8
Chip Select Module
This chapter describes the chip select module, including the chip select registers, the
configuration and behavior of the chip select signals, and the global chip select functions.
8.1 Overview
The chip select module provides user-programmable control of the eight chip select and
four byte strobe outputs. This subsection describes the operation and programming model
of the chip select registers, including the chip select base and option registers.
8.1.1 Features
The following list summarizes the key chip select features:
8.1.2 Chip Select Usage
Each of the eight chip selects, CS0–CS7, is configurable for external SRAM, ROM, and
peripherals. CS0 is used to access external boot ROM and is enabled after a reset. The data
bus width of the external ROM must be configured at reset by having appropriate pull-down
resistors on QSPI_CLK/BUSW1 and QSPI_CS0/BUSW0. At reset these two signals
replace the bus width field in the chip select 0 base register (CSBR0[BW]).
CS7 must be used for enabling an external SDRAM array. In this mode, it is referred to as
SDCS.
• Eight dedicated programmable chip selects
• Address masking for memory block sizes from 4 Kbytes to 2 Gbytes
• Programmable wait states and port sizes
• Programmable address setup
• Programmable address hold for read and write
• SDRAM controller interface supported with CS7/SDCS
• Global chip select functionality
Chapter 8. Chip Select Module
8-1
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