MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 20
![PROCESSOR MODULE FLASH MOD5272](/photos/6/75/67555/mod5272-100ir_sml.jpg)
MOD5272-100IR
Manufacturer Part Number
MOD5272-100IR
Description
PROCESSOR MODULE FLASH MOD5272
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(2 pages)
2.MOD5272-100IR.pdf
(3 pages)
3.MOD5272-100IR.pdf
(550 pages)
Specifications of MOD5272-100IR
Module/board Type
Processor Module
Ethernet Connection Type
10/100 Ethernet Port RJ-45
Operating Voltage
3.3 V
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MOD5272
For Use With
528-1001 - KIT DEVELOP NETWORK FOR MOD5272
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
528-1008
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Paragraph
Number
20.1
20.2
20.2.1
20.2.2
20.2.3
20.2.4
20.2.5
20.3
20.4
20.5
20.5.1
20.6
20.6.1
20.6.2
20.7
20.8
20.9
20.10
20.11
20.12
20.12.1
20.12.2
20.12.3
20.12.4
21.1
21.2
21.3
21.4
21.5
21.6
21.7
xx
Features ............................................................................................................. 20-1
Bus and Control Signals.................................................................................... 20-1
Bus Exception: Double Bus Fault..................................................................... 20-4
Bus Characteristics............................................................................................ 20-4
Data Transfer Mechanism................................................................................. 20-4
External Bus Interface Types............................................................................ 20-8
Burst Data Transfers ....................................................................................... 20-18
Misaligned Operands ...................................................................................... 20-18
Interrupt Cycles............................................................................................... 20-19
Bus Errors ....................................................................................................... 20-20
Bus Arbitration................................................................................................ 20-22
Reset Operation............................................................................................... 20-22
Overview........................................................................................................... 21-1
JTAG Test Access Port and BDM Debug Port................................................. 21-2
TAP Controller.................................................................................................. 21-3
Boundary Scan Register.................................................................................... 21-4
Instruction Register........................................................................................... 21-7
Restrictions ....................................................................................................... 21-8
Non-IEEE 1149.1 Operation............................................................................. 21-9
Address Bus (A[22:0]).................................................................................. 20-2
Data Bus (D[31:0]) ....................................................................................... 20-2
Read/Write (R/W)......................................................................................... 20-2
Transfer Acknowledge (TA)......................................................................... 20-3
Transfer Error Acknowledge (TEA)............................................................. 20-3
Bus Sizing ..................................................................................................... 20-5
Interface for FLASH/SRAM Devices with Byte Strobes............................. 20-8
Interface for FLASH/SRAM Devices without Byte Strobes...................... 20-13
Master Reset ............................................................................................... 20-23
Normal Reset .............................................................................................. 20-24
Software Watchdog Timer Reset Operation............................................... 20-25
Soft Reset Operation................................................................................... 20-26
IEEE 1149.1 Test Access Port (JTAG)
MCF5272 User’s Manual
CONTENTS
Bus Operation
Chapter 20
Chapter 21
Title
MOTOROLA
Number
Page
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