MC68EC060RC50 Freescale Semiconductor, MC68EC060RC50 Datasheet - Page 21

• Manufacturer Part Number: MC68EC060RC50
• Description: IC MPU 32BIT 50MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC060RC50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Operating Temp Range: 0C to 110C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 206
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

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MOTOROLA
Data Formats.................................................................................................... 1-14
Effective Addressing Modes............................................................................. 1-15
Instruction Set Summary .................................................................................. 1-16
Notational Conventions .................................................................................... 1-21
Signal Index........................................................................................................ 2-1
Transfer-Type Encoding..................................................................................... 2-4
Normal and MOVE16 Access TMx Encoding..................................................... 2-5
Alternate Access TMx Encoding ........................................................................ 2-5
SIZx Encoding .................................................................................................... 2-6
Data Bus Byte Select Signals............................................................................. 2-7
PSTx Encoding................................................................................................. 2-14
Signal Summary ............................................................................................... 2-17
Updating U-Bit and M-Bit for Page Descriptors................................................ 4-20
SFC and DFC Values....................................................................................... 4-20
TLNx Encoding................................................................................................. 5-11
Instruction Cache Line State Transitions.......................................................... 5-15
Data Cache Line State Transitions................................................................... 5-18
RND Encoding.................................................................................................... 6-4
PREC Encoding ................................................................................................. 6-4
MC68060 FPU Data Formats and Data Types .................................................. 6-7
Single-Precision Real Format Summary ............................................................ 6-8
Double-Precision Real Format Summary........................................................... 6-9
Extended-Precision Real Format Summary ..................................................... 6-10
Packed Decimal Real Format Summary .......................................................... 6-11
Floating-Point Condition Code Encoding ......................................................... 6-16
Floating-Point Conditional Tests ...................................................................... 6-18
Floating-Point Exception Vectors ..................................................................... 6-19
Unimplemented Instructions............................................................................. 6-20
Possible Operand Errors Exceptions ............................................................... 6-27
Overflow Rounding Mode Values..................................................................... 6-29
Underflow Rounding Mode Values................................................................... 6-31
Possible Divide-by-Zero Exceptions................................................................. 6-33
Rounding Mode Values .................................................................................... 6-34
Data Bus Requirements for Read and Write Cycles .......................................... 7-7
Summary of Access Types vs. Bus Signal Encoding......................................... 7-9
Memory Alignment Influence on Noncachable and
Writethrough Bus Cycles.................................................................................. 7-12
Interrupt Acknowledge Termination Summary ................................................. 7-34
Termination Result Summary........................................................................... 7-46
MC68040-Arbitration Protocol Transition Conditions ....................................... 7-55
LIST OF TABLES
M68060 USER’S MANUAL
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