MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 67

• Manufacturer Part Number: MC68030FE25C
• Description: IC MPU 32BIT ENHANCED 132-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68030FE25C

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-CQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: CQUAD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

2
2.5 EFFECTIVE ADDRESS ENCODING SUMMARY
2-22
word. The encoding of the mode field of this word selects the addressing
the instruction word followed by the brief format extension word. Other
of extension words. The longest instruction for the MC68030 contains 10
for both the source and destination effective addresses and with 32-bit base
displacements and 32-bit outer displacements for both addresses. However,
coprocessor instructions can have any number of extension words. Refer to
the coprocessor instruction formats in SECTION 10 C O P R O C E S S O R INTER-
sponding to all combinations of IS and I/IS values.
2-4. The single effective address instruction is in the format of the instruction
mode. The register field contains the general register number or a value that
selects the addressing mode when the mode field contains " 1 1 1 " . Table
2-2 shows the encoding of these fields. Some indexed or indirect modes use
indexed or indirect modes consist of the instruction word and the full format
extension words. It is a MOVE instruction with full format extension words
FACE DESCRIPTION.
For effective addresses that use the full format, the index suppress (IS) bit
and the index/indirect selection (I/IS) field determine the type of indexing and
indirection. Table 2-1 lists the indexing and indirection operations corre-
Most of the addressing modes use one of the three formats shown in Figure
IS
0
0
0
0
0
0
0
0
1
1
1
1
1
Table 2-1. IS-I/IS M e m o r y
Index/Indirect
100-111
000
001
010
011
100
111
000
001
010
011
101
110
MC68030 USER'S MANUAL
No Memory Indirection
Indirect Preindexed with Null Outer Displacement
Indirect Preindexed with Word Outer Displacement
indirect Preindexed with Long Outer Displacement
Reserved
Indirect Postindexed with Null Outer Displacement
Indirect Postindexed with Word Outer Displacement
Indirect Postindexed with Long Outer Displacement
Memory Indirect with Null Outer Displacement
No Memory Indirection
Memory Indirect with Word Outer Displacement
Memory Indirect with Long Outer Displacement
Reserved
Indirection
Operation
Encodings
MOTOROLA