MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 76

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MC68030FE25C

Manufacturer Part Number
MC68030FE25C
Description
IC MPU 32BIT ENHANCED 132-CQFP
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68030FE25C

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-CQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
CQUAD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68030FE25C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68030FE25C
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
MOTOROLA
2.6.2 General Addressing M o d e S u m m a r y
The postindexed indirect mode with outer displacement (see Figure 2-14)
the data item within the selected data structure.
uses the contents of An as an index to the pointer list at the displacement.
Register Xn is used as an index to the structure of data structures at the
address in the pointer. The outer displacement (od) is the displacement of
The addressing modes described in the previous section are derived from
specific combinations of options in the indexing mode or a selection of two
alternate addressing modes. For example, the addressing mode called reg-
the effective address specification. Assigning an address register as Rn pro-
vides higher performance than using a data register as Rn. Another case is
with the index register suppressed.
ister indirect (Rn) assembles as the address register indirect if the register is
an address register. If Rn is a data register, the assembler uses the address
register indirect with index mode using the data register as the indirect reg-
ister and suppresses the address register by setting the base suppress bit in
(bd,An), which selects an addressing mode depending on the size of the
displacement. If the displacement is 16 bits or less, the address register
indirect with displacement mode (d16,An) is used. When a 32-bit displace-
ment is required, the address register indirect with index (bd,An,Xn) is used
Figure 2-14. Postindexed Indirect Addressing with Outer Displacement
bd
MC68030 USER'S MANUAL
POINTER LIST
POINTER
An
SYNTAX: ([bd, An],Xn,od)
L
/
L
WITH OUTER DISPLACEMENT
POST-INDEXED STRUCTURE
DATA ITEM
od
Xn
I
L
I
2-31

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