MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 14

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MC68030RC40C

Manufacturer Part Number
MC68030RC40C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68030RC40C

Processor Type
M680x0 32-Bit
Speed
40MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
40MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
128
Package Type
PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68030RC40C
Manufacturer:
MOT
Quantity:
100
Part Number:
MC68030RC40C
Manufacturer:
MOT
Quantity:
100
Part Number:
MC68030RC40C
Manufacturer:
MOT
Quantity:
5 704
Xii
Paragraph
10.3.6
10.3.8
10.3.t0
10.4
10.4.2
Number
10.2.3.4
10.2.3.4.1
10.2.3.4.2
10.3
10.3.1
10.3.2
10.3.3
10.3.4
10.3.5
10.3.7
10.3.9
10.3.11
10.4.1
10.4.3
10.4.4
10.4.5
10.4.6
10.4.7
10.4.8
10.4.9
10.4.10
10.4.11
10.4.12
10.4.13
10.4.14
10.4.15
10.4.16
10.4.17
10.4.19
10.5
10.5.1
10.4.18
10.4.20
Coprocessor Response Primitives ............................................. 10-33
Coprocessor Interface Register Set ........................................... 10-29
Exceptions ............................................................................. 10-61
T r a n s f e r M u l t i p l e Main Processor Registers Primitive ........... 10-52
Transfer Operation Word Primitive ..................................... 10-40
Take Address and Transfer Data Primitive ........................... 10-48
Transfer Single M a i n Processor Register Primitive ............... 10-50
Control CIR ...................................................................... 10-30
Save CIR .......................................................................... 10-30
Restore CIR ...................................................................... 10-31
Operation Word CIR .......................................................... 10-31
C o m m a n d CIR .................................................................. 10-31
C o n d i t i o n CIR ................................................................... 10-31
Operand CIR ..................................................................... 10-32
Instruction A d d r e s s CIR ..................................................... 10-33
Operand A d d r e s s CIR ........................................................ 10-33
ScanPC ............................................................................ 10-34
Coprocessor Response Primitive General Format ................. 10-35
S u p e r v i s o r Check Primitive ................................................ 10-40
Transfer from Instruction Stream Primitive .......................... 10-41
Evaluate and Transfer Effective Address Primitive ................ 10-42
Evaluate Effective Address and Transfer Data Primitive ........ 10-43
Write to P r e v i o u s l y Evaluated Effective Address Primitive ..... 10-46
Transfer to/from Top of Stack Primitive ............................... 10-49
Transfer Main Processor Control Register Primitive .............. 10-50
Transfer M u l t i p l e Coprocessor Registers Primitive ................ 10-52
Transfer Status Register and ScanPC Primitive .................... 10-55
Take Pre-lnstruction Exception Primitive .............................. 10-56
Take M i d - I n s t r u c t i o n Exception Primitive ............................. 10-58
Take Post-Instruction Exception Primitive ............................ 10-60
Coprocessor-Detected Exceptions ....................................... 10-61
Response CIR ................................................................... 10-29
Register Select CIR ............................................................ 10-32
Busy Primitive ................................................................... 10-36
Null Primitive
TABLE OF CONTENTS (Continued)
Coprocessor Context Restore Instruction ....................... 10-27
Format ................................................................. 10-27
Protocol ............................................................... 10-28
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MC68030 USER'S MANUAL
Title
MOTOROLA
Number
Page
10-37

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