MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 361

• Manufacturer Part Number: MC68030RC40C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC40C

• Processor Type: M680x0 32-Bit
• Speed: 40MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 40MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

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9-60
The bits in the MMUSR have different meanings for the two kinds of PTEST
instructions, as shown in Table 9-3.
Transparent (T)
S u p e r v i s o r Violation This bit is cleared.
(s)
Write Protected (W)
Bus Error (B)
Limit (L)
Invalid (I)
Modified (M)
Number of Levels (N) This 3-bit field is cleared to zero.
MMUSR Bit
translation. The I bit is set if the
t r a n s l a t i o n f o r the specified
This bit is set if the ATC entry
This bit is set if a match oc-
transparent translation regis-
ters (TT0 or TT1). If the T bit is
This bit is set if the bus error bit
specified logical address.
This bit is cleared.
This bit is set if the WP bit ofl
the ATC entry is set. It is un-
defined if the I bit is set.
This bit indicates an invalid
logical address is not resident
in the ATC or if the B bit of the
corresponding ATC entry is set.
corresponding to the specified
address has the modified bit set.
It is undefined if the I bit is set.
curred in either (or both) of the
set, all remaining MMUSR bits
are undefined.
is set in the ATC entry for the
Table 9-3. MMUSR Bit Definitions
MC68030 USER'S MANUAL
PTEST, Level 0
This bit is set if a bus error is encountered
during the table search for the PTEST instruc-
tion.
This bit is set if an index exceeds a limit during
the table search.
This bit is set if the S bit of a long (S) format
table descriptor or tong format page descrip-
tor encountered during the search is set, and
the FC2 bit of the function code Specified by
the PTEST instruction is not equal to one. The
S bit is undefined if the I bit is set.
This bit is set, if a descriptor or page descriptor
is encountered with the WP bit set during the
table search. The W bit is undefined if the
bit is set.
This bit indicates an invalid translation. The
bit is set if the DT field of a table or a page
descriptor encountered during the serach is
set to invalid or if either the B or L bits of the
MMUSR are set during the table search.
This bit is set if the page descriptor for the
specified address has the modified bit set. It
is undefined if I is set.
This bit is set to zero.
This 3-bit field contains the actual number of
tables accessed during the search.
PTEST, Level 1-7
MOTOROLA