MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 400

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MC68030RC40C

Manufacturer Part Number
MC68030RC40C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68030RC40C

Processor Type
M680x0 32-Bit
Speed
40MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
40MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
128
Package Type
PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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10.2.2.1 BRANCH ON COPROCESSOR CONDITION INSTRUCTION.
MOTOROLA
coprocessor can use response primitives to request that the main processor
condition, the coprocessor returns a true false indicator to the main processor
The main processor completes the coprocessor instruction execution when
tional instruction category includes two formats of the M68000 Family branch
cessor operation. They execute similarly to the conditional branch instruc-
tions provided in the M68000 Family instruct/on set.
Figure 10-8 shows the protocol for a conditional category coprocessor in-
struction. The main processor initiates execution of an instruction in this
category by writing a condition selector to the condition CIR. The coprocessor
decodes the condition selector to determine the condition to evaluate. The
provide services required for the condition evaluation. After evaluating the
by placing a null primitive (refer to 10.4.4 Null Primitive) in the response CIR.
it receives the condition indicator from the coprocessor.
instruction. These instructions branch on conditions related to the copro-
M1
M3
M4
M2
NOTES: 1. All coprocessor response primitives, except the NuD primitive, that allow the "Come Again"
THE TRUE/FALSE CONDITION INDICATOR
RECOGNIZE COPROCESSOR INSTRUCT/ON F-LINE
OPERATION WORD
WRITE COPROCESSOR CONDITION SELECTOR TO
CONDITION CIR
READ COPROCESSOR RESPONSE PRIMITIVE CODE
FROM RESPONSE CIR
2) IF (COPROCESSOR RESPONSE PRIMITIVE
COMPLETE EXECUTION OF INSTRUCTION BASED ON
RETURNED IN THE RESPONSE CIR
1) PERFORM SERVICE REQUESTED BY RESPONSE
PRIMITIVE
INDICATES "COME AGAIN") GO TO M3
(SEE NOTE 1)
Figure 10-8. Coprocessor Interface Protocol for Conditional
conditional category instruction. If a "Come Again" attribute is not indicated in one of these
pri m•ti•es• the main pr••ess•r
primitive attribute must indicate "'Come Again" when used during the execution of a
PROTOCOL VIOLATIONS)
MAIN PROCESSOR
MC68030 USER'S MANUAL
Category Instructions
wiR initiate pr•t•c•[
C1
C2
C3
C4
v;o•ati•n ex•epti•n pr•ces•ing •see1•.6•2•1
DECODE CONDITION SELECTOR AND INITIATE
CONOIllON EVALUATION
WHILE (MAIN PROCESSOR SERVICE IS REQUIRED
O0 STEPS I) AND 2) BELOW
COMPLETE CONDITION EVALUATION
REFLECT "'NO COME AGAIN" STATUS WITH TRUE/FALSE
CONOIIION i N DICATOR IN RESPONSE CIR
2) RECEIVE SERVICE FROM MAIN PROCESSOR
1) REQUEST SERVICE BY PLACING APPROPRIATE
RESPONSE PRIMmVE COBE IN RESPONSE CIR
COPROCESSOR
The condi-
10-13
10

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