MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 368

• Manufacturer Part Number: MC68030RC40C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC40C

• Processor Type: M680x0 32-Bit
• Speed: 40MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 40MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

MOTOROLA
the operating system portion of the address space unless the operating sys-
tem allows it or wishes to share common routines. The advantages of this
The next logical step toward increased operating system complexity, with
shared user and supervisor virtual memory maps, is to keep the supervisor
addresses separate but to give each user task its own use of the remainder
ory space from zero to 512 Mbytes; the operating system programs and data
would occupy the remainder of the space, from 512 Mbytes up to 4 Gbytes.
scheme are that it provides a much larger virtual address space for each user
task and it avoids virtual memory fragmentation problems. Disadvantages
agement and the restriction of operating system access to only the current
There are few absolute rules in the use of the MC68030 MMU. In general,
the statement regarding restricting operating system access to only one user
task using the scheme described in the preceding paragraph holds true.
address space, 256 such address spaces can be mapped simultaneously. The
supervisor translation tables can include each of these spaces, and the su-
the MMU.
The most complex systems and those that implement virtual machine ca-
all user tasks, or possibly even those of individual supervisor tasks. Each
for the program and another for its data can be provided for each task. Both
the SRP and the CRP are probab!y used, since nothing is common among
the various spaces. The operating system uses the MOVES instruction to
of the virtual space. For example, each user task could have the virtual mem-
Each user task has its own set of translation tables. The supervisor root
pointer may or may not be used, depending on whether the user tables also
map the supervisor space. As in the preceding method, the user cannot access
of this scheme include the requirement for slightly more complex table man-
user task.
However, by using the entire 4-Gbyte virtual address space and cross map-
ping the address space, the supervisor can access each user task space as
a distinct portion of its own supervisor map. If each user task is limited to a
pervisor can access each task using indexed addressing with a register that
contains the proper constant for a particular task. This constant provides a
supervisor-to-user virtual address conversion. A systems programmer can
implement some very sophisticated functions that exploit the flexibility of
pability completely separate the virtual address spaces of the supervisor and
user or supervisor task has its own virtual memory space starting at zero
and extending to 4 Gbytes. Using the function code, a 4-Gbyte address space
interact with the user space. The advantages of this implementation are the
maximum availability of the virtual space and a complete logical separation
16-Mbyte virtual address space and the supervisor only requires a 16-Mbyte
MC68030 USER'S MANUAL
9-67