MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 260

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MC68030RC40C

Manufacturer Part Number
MC68030RC40C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68030RC40C

Processor Type
M680x0 32-Bit
Speed
40MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
40MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
128
Package Type
PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68030RC40C
Manufacturer:
MOT
Quantity:
100
Part Number:
MC68030RC40C
Manufacturer:
MOT
Quantity:
100
Part Number:
MC68030RC40C
Manufacturer:
MOT
Quantity:
5 704
SIZO-SIZ1
7.7.2 Bus Grant
MOTOROLA
FCO-FC2
DSACK1
DSACKO
D O - D 3 1
AO-A31
BGACK
DBE-' ~
R/W
OCS
ECS
CLK
ZZX
ZZX
__/
-k_/
~
ZZX
-k_/
The processor asserts BG as soon as possible after receipt of BR. This is
immediately following internal synchronization except during a read-modify-
write cycle or following an internal decision to execute a bus cycle. During
a read-modify-write cycle, the processor does not assert BG until the entire
operation has completed. RMC is asserted to indicate that the bus is locked,
in the case an internal decision to execute another bus cycle, BG is deferred
until the bus cycle has begun.
SO
$2
\
\
PROCESSOR
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Figure 7-60. Bus Arbitration Operation Timing
$4
\
>
>
>
>
\
/
/
MC68030 USER'S MANUAL
\
/
DMA DEVICE
/
=1
/
,'--k___
<
<
<
/
~
SO
\
P R O C E S S O R
$2
7-99
7

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