Z16C3516VSG Zilog, Z16C3516VSG Datasheet - Page 63
Z16C3516VSG
Manufacturer Part Number
Z16C3516VSG
Description
IC 16MHZ Z8500 CMOS ISCC 68-PLCC
Manufacturer
Zilog
Series
IUSC™r
Specifications of Z16C3516VSG
Controller Type
Serial Communications Controller (SCC)
Interface
USB
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
50mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
68-LCC (J-Lead)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4690-5
Z16C3516VSG
Z16C3516VSG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z16C3516VSG
Manufacturer:
INTEL
Quantity:
6 219
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UM011001-0601
5.4 WRITE REGISTERS
The following sections describe WR registers in detail.
5.4.1 Write Register 0 (Command Register)
WR0 is the command register and the CRC reset code
register. WR0 takes on slightly different forms depending
upon whether the ISCC is in the multiplexed or non-multi-
plexed bus mode of operation. Figure 5-1 shows the bit
Write Register 0 (non-multiplexed bus mode)
Figure 5-1. WR0 in the Non-Multiplexed Bus Mode
D7
0
0
1
1
* With Point High Command
D6
0
1
0
1
D5 D4 D3 D2 D1 D0
0
0
0
0
1
1
1
1
Null Code
Reset Rx CRC Checker
Reset Tx CRC Generator
Reset Tx Underrun/EOM Latch
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Null Code
Point High
Reset Ext/Status Interrupts
Send Abort (SDLC)
Enable Int on Next Rx Character
Reset Tx Int Pending
Error Reset
Reset Highest IUS
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Register 0
Register 1
Register 2
Register 3
Register 4
Register 5
Register 6
Register 7
Register 8
Register 9
Register 10
Register 11
Register 12
Register 13
Register 14
Register 15
*
P R E L I M I N A R Y
configuration for the non-multiplexed mode and includes
register select bits in addition to command and reset
codes.
Figure 5-2 shows the bit configuration for the multiplexed
mode and includes (in Channel B only) the address decod-
ing select described later.
Write Register 0 (multiplexed bus mode)
D7
0
0
1
1
* B Channel Only
Figure 5-2. WR0 in the Multiplexed Bus Mode
D6
0
1
0
1
D5 D4 D3 D2 D1 D0
0
0
0
0
1
1
1
1
Null Code
Reset Rx CRC Checker
Reset Tx CRC Generator
Reset Tx Underrun/EOM Latch
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Null Code
Null Code
Reset Ext/Status Interrupts
Send Abort
Enable Int on Next Rx Character
Reset Tx Int Pending
Error Reset
Reset Highest IUS
0
0
1
1
Z16C35ISCC™ User’s Manual
0
1
0
1
Null Code
Null Code
Select Shift Left Mode
Select Shift Right Mode
Register Descriptions
0
5-3
*
5
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