PIC18F26K80-I/ML Microchip Technology Inc., PIC18F26K80-I/ML Datasheet - Page 195
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PIC18F26K80-I/ML
Manufacturer Part Number
PIC18F26K80-I/ML
Description
28 QFN-S 6X6MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F26K80-I/ML
A/d Inputs
8-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
- Current page: 195 of 628
- Download datasheet (6Mb)
11.7
PORTF is an 8-bit wide, bidirectional port. The
corresponding Data Direction and Output Latch registers
are TRISF and LATF. All pins on PORTF are
implemented with Schmitt Trigger input buffers. Each pin
is individually configurable as an input or output.
Each of the PORTF pins has a weak internal pull-up. A
single control bit can turn off all the pull-ups. This is
done by clearing bit, RFPU (PADCFG1<5>). The weak
pull-up is automatically turned off when the port pin is
configured as an output. The pull-ups are disabled on
any device Reset.
TABLE 11-11:
TABLE 11-12: SUMMARY OF REGISTERS ASSOCIATED WITH PORTF
2011 Microchip Technology Inc.
RF0/MDMIN
RF1
RF2/MDCIN1
RF3
RF4/MDCIN2
RF5
RF6/MDOUT
RF7
Legend:
PORTF
LATF
TRISF
PADCFG1
Legend: — = unimplemented, read as ‘ 0 ’. Shaded cells are not used by PORTF.
Note 1:
Note:
Name
Pin Name
PORTF, LATF and TRISF Registers
O = Output, I = Input, ANA = Analog Signal, DIG = CMOS Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Unimplemented on 28-pin devices; read as ‘ 0 ’.
PORTF is only available on 64-pin devices.
TRISF7
LATF7
RDPU
PORTF FUNCTIONS
Bit 7
Function
RF7
MDCIN1
MDCIN2
MDOUT
MDMIN
RF0
RF1
RF2
RF3
RF4
RF5
RF6
RF7
Setting
TRISF6
LATF6
REPU
TRIS
Bit 6
RF6
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
0
0
1
I/O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
(LEGEND:)
RFPU
TRISF5
LATF5
Bit 5
RF5
I/O Type
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
(1)
Preliminary
LATF<0> data output.
PORTF<0> data input.
Modulator source input.
LATF<1> data output.
PORTF<1> data input.
LATF<2> data output.
PORTF<2> data input.
Modulator Carrier Input 1.
LATF<3> data output.
PORTF<3> data input.
LATF<4> data output.
PORTF<4> data input.
Modulator Carrier Input 2.
LATF<5> data output.
PORTF<5> data input.
LATF<6> data output.
PORTF<6> data input.
Modulator output.
LATF<7> data output.
PORTF<7> data input.
RGPU
TRISF4
LATF4
Bit 4
RF4
PIC18F66K80 FAMILY
(1)
EXAMPLE 11-6:
CLRF
CLRF
MOVLW
MOVWF
Note:
TRISF3
Bit 3
RF3
—
—
PORTF
LATF
0CEh
TRISF
On device Resets, pins, RF<7:1>, are
configured as analog inputs and are read
as ‘ 0 ’.
Description
TRISF2
LATF2
; Initialize PORTF by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RF3:RF1 as inputs
; RF5:RF4 as outputs
; RF7:RF6 as inputs
Bit 2
RF2
—
INITIALIZING PORTF
TRISF1
LATF1
Bit 1
RF1
—
DS39977C-page 195
CTMUDS
TRISF0
LATF0
Bit 0
RF0
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