PIC18F26K80-I/ML Microchip Technology Inc., PIC18F26K80-I/ML Datasheet - Page 75
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PIC18F26K80-I/ML
Manufacturer Part Number
PIC18F26K80-I/ML
Description
28 QFN-S 6X6MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F26K80-I/ML
A/d Inputs
8-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
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REGISTER 4-1:
2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
Only implemented on devices with 64 pins (PIC18F6XK80, PIC18LF6XK80).
Unimplemented: Read as ‘0’
MODMD: Modulator Output Module Disable bit
1 = The modulator output module is disabled. All Modulator Output registers are held in Reset and
0 = The modulator output module is enabled
ECANMD: Enhanced CAN Module Disable bit
1 = The Enhanced CAN module is disabled. All Enhanced CAN registers are held in Reset and are
0 = The Enhanced CAN module is enabled
CMP2MD: Comparator 2 Module Disable bit
1 = The Comparator 2 module is disabled. All Comparator 2 registers are held in Reset and are not
0 = The Comparator 2 module is enabled
CMP1MD: Comparator 1 Module Disable bit
1 = The Comparator 1 module is disabled. All Comparator 1 registers are held in Reset and are not
0 = The Comparator 1 module is enabled
are not writable.
not writable.
writable.
writable.
U-0
—
PMD2: PERIPHERAL MODULE DISABLE REGISTER 2
W = Writable bit
‘1’ = Bit is set
U-0
—
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
MODMD
R/W-0
(1)
ECANMD
R/W-0
x = Bit is unknown
CMP2MD
R/W-0
DS39977C-page 75
CMP1MD
R/W-0
bit 0
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