PIC18F26K80-I/ML Microchip Technology Inc., PIC18F26K80-I/ML Datasheet - Page 390
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PIC18F26K80-I/ML
Manufacturer Part Number
PIC18F26K80-I/ML
Description
28 QFN-S 6X6MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F26K80-I/ML
A/d Inputs
8-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
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PIC18F66K80 FAMILY
The module is enabled by setting the HLVDEN bit
(HLVDCON<4>). Each time the HLVD module is
enabled, the circuitry requires some time to stabilize.
The IRVST bit (HLVDCON<5>) is a read-only bit used
to indicate when the circuit is stable. The module can
only generate an interrupt after the circuit is stable and
IRVST is set.
The VDIRMAG bit (HLVDCON<7>) determines the
overall operation of the module. When VDIRMAG is
cleared, the module monitors for drops in V
predetermined set point. When the bit is set, the
module monitors for rises in V
26.1
When the HLVD module is enabled, a comparator uses
an internally generated reference voltage as the set
point. The set point is compared with the trip point,
where each node in the resistor divider represents a
FIGURE 26-1:
DS39977C-page 390
V
DD
Operation
Externally Generated
Trip Point
HLVDIN
HLVD MODULE BLOCK DIAGRAM (WITH EXTERNAL INPUT)
HLVDEN
BOREN
DD
above the set point.
V
DD
DD
below a
Preliminary
HLVDL<3:0>
trip point voltage. The “trip point” voltage is the voltage
level at which the device detects a high or low-voltage
event, depending on the configuration of the module.
When the supply voltage is equal to the trip point, the
voltage tapped off of the resistor array is equal to the
internal reference voltage generated by the voltage
reference module. The comparator then generates an
interrupt signal by setting the HLVDIF bit.
The trip point voltage is software programmable to any one
of 16 values. The trip point is selected by programming the
HLVDL<3:0> bits (HLVDCON<3:0>).
The HLVD module has an additional feature that allows
the user to supply the trip voltage to the module from an
external source. This mode is enabled when bits,
HLVDL<3:0>, are set to ‘ 1111 ’. In this state, the
comparator input is multiplexed from the external input
pin, HLVDIN. This gives users the flexibility of configur-
ing the High/Low-Voltage Detect interrupt to occur at
any voltage in the valid operating range.
Internal Voltage
1.024V Typical
Reference
HLVDEN
HLVDCON
Register
2011 Microchip Technology Inc.
VDIRMAG
HLVDIF
Set
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