PIC18F26K80-I/ML Microchip Technology Inc., PIC18F26K80-I/ML Datasheet - Page 424
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F26K80-I/ML
Manufacturer Part Number
PIC18F26K80-I/ML
Description
28 QFN-S 6X6MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F26K80-I/ML
A/d Inputs
8-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
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PIC18F66K80 FAMILY
REGISTER 27-35: BnDLC: TX/RX BUFFER ‘n’ DATA LENGTH CODE REGISTERS IN TRANSMIT MODE
REGISTER 27-36: BSEL0: BUFFER SELECT REGISTER 0
DS39977C-page 424
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-4
bit 3-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
Note 1:
B5TXEN
R/W-0
U-0
—
These registers are available in Mode 1 and 2 only.
These registers are available in Mode 1 and 2 only.
Unimplemented: Read as ‘ 0 ’
TXRTR: Transmitter Remote Transmission Request bit
1 = Transmitted message will have the RTR bit set
0 = Transmitted message will have the RTR bit cleared
Unimplemented: Read as ‘ 0 ’
DLC<3:0>: Data Length Code bits
1111 - 1001 = Reserved
1000 = Data length = 8 bytes
0111 = Data length = 7 bytes
0110 = Data length = 6 bytes
0101 = Data length = 5 bytes
0100 = Data length = 4 bytes
0011 = Data length = 3 bytes
0010 = Data length = 2 bytes
0001 = Data length = 1 byte
0000 = Data length = 0 bytes
B<5:0>TXEN: Buffer 5 to Buffer 0 Transmit Enable bits
1 = Buffer is configured in Transmit mode
0 = Buffer is configured in Receive mode
Unimplemented: Read as ‘ 0 ’
B4TXEN
TXRTR
R/W-x
R/W-0
[0 n 5, TXnEN (BSEL<n>) = 1]
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
B3TXEN
R/W-0
U-0
—
B2TXEN
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
B1TXEN
(1)
R/W-x
R/W-0
DLC3
(1)
B0TXEN
R/W-0
R/W-x
DLC2
2011 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-x
DLC1
U-0
—
R/W-x
DLC0
U-0
—
bit 0
bit 0
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