PIC18F26K80-I/ML Microchip Technology Inc., PIC18F26K80-I/ML Datasheet - Page 91
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F26K80-I/ML
Manufacturer Part Number
PIC18F26K80-I/ML
Description
28 QFN-S 6X6MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F26K80-I/ML
A/d Inputs
8-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
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TABLE 5-4:
2011 Microchip Technology Inc.
POSTINC2
POSTDEC2
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
OSCCON
OSCCON2
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
ECCP1AS
CCPR1H
CCPR1L
CCP1CON
Legend:
Note 1:
Register
(4)
2:
3:
4:
5:
6:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
See
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read ‘0’.
This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
Table 5-3
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
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PIC18F2XK80
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PIC18F2XK80
PIC18F2XK80
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PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
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PIC18F2XK80
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PIC18F2XK80
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PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
for Reset value for specific condition.
Applicable Devices
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
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PIC18F4XK80
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PIC18F4XK80
PIC18F4XK80
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PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
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PIC18F4XK80
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PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
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PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
Preliminary
PIC18F66K80 FAMILY
---- xxxx
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
0100 q000
-x-x x-xx
0-x0 -xx0
0111 11q0
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1111 1111
-000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
-000 0000
0000 0qqq
0-00 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
Brown-out
Power-on
Reset,
Reset
N/A
N/A
N/A
N/A
RESET Instruction,
MCLR Resets,
Stack Resets
WDT Reset,
---- uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
1111 1111
0100 00q0
-0-0 0-01
0-x0 -xx0
0111 qquu
uuuu uuuu
uuuu uuuu
u0uu uuuu
0000 0000
1111 1111
-000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
-000 0000
0000 0qqq
0-00 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 0000
N/A
N/A
N/A
N/A
DS39977C-page 91
Wake-up via
---- uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuqu
-u-u u-uu
u-u0 -uu0
uuuu qquu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
u-uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
or Interrupt
xxxx xxxx
WDT
N/A
N/A
N/A
N/A
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