PIC18F26K80-I/ML Microchip Technology Inc., PIC18F26K80-I/ML Datasheet - Page 334
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F26K80-I/ML
Manufacturer Part Number
PIC18F26K80-I/ML
Description
28 QFN-S 6X6MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F26K80-I/ML
A/d Inputs
8-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
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PIC18F66K80 FAMILY
FIGURE 21-29:
FIGURE 21-30:
DS39977C-page 334
SDA
SCL
SEN
BCLIF
S
SSPIF
S
BCLIF
SSPIF
SDA
SCL
SEN
BUS COLLISION DURING START CONDITION (SCL = 0)
BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION
‘0’
‘0’
SDA pulled low by other master.
Reset BRG and assert SDA.
SCL = 0 before BRG time-out,
bus collision occurs. Set BCLIF.
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
Less than T
BRG
SDA = 0, SCL = 1
SDA = 0, SCL = 1
SDA = 0, SCL = 1,
set SSPIF
Preliminary
T
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
BRG
S
Set S
T
BRG
T
BRG
Set SSPIF
SCL = 0 before SDA = 0,
bus collision occurs. Set BCLIF.
SCL pulled low after BRG
time-out
Interrupt cleared
in software
Interrupts cleared
in software
2011 Microchip Technology Inc.
‘0’
‘0’
‘0’
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