PIC18F26K80-I/ML Microchip Technology Inc., PIC18F26K80-I/ML Datasheet - Page 441
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PIC18F26K80-I/ML
Manufacturer Part Number
PIC18F26K80-I/ML
Description
28 QFN-S 6X6MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F26K80-I/ML
A/d Inputs
8-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
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REGISTER 27-59: TXBIE: TRANSMIT BUFFERS INTERRUPT ENABLE REGISTER
REGISTER 27-60: BIE0: BUFFER INTERRUPT ENABLE REGISTER 0
2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-2
bit 1-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
Note 1:
B5IE
R/W-0
U-0
—
2:
2:
(2)
This register is available in Mode 1 and 2 only.
TXBnIE in PIE5 register must be set to get an interrupt.
This register is available in Mode 1 and 2 only.
Either TXBnIE or RXBnIE in the PIE5 register must be set to get an interrupt.
Unimplemented: Read as ‘ 0 ’
TXB2IE:TXB0IE: Transmit Buffer 2-0 Interrupt Enable bits
1 = Transmit buffer interrupt is enabled
0 = Transmit buffer interrupt is disabled
Unimplemented: Read as ‘ 0 ’
B<5:0>IE: Programmable Transmit/Receive Buffer 5-0 Interrupt Enable bits
1 = Interrupt is enabled
0 = Interrupt is disabled
RXB<1:0>IE: Dedicated Receive Buffer 1-0 Interrupt Enable bits
1 = Interrupt is enabled
0 = Interrupt is disabled
B4IE
R/W-0
U-0
—
(2)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
B3IE
R/W-0
U-0
—
(2)
TXB2IE
B2IE
R/W-0
R/W-0
Preliminary
(2)
(2)
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
TXB1IE
B1IE
R/W-0
R/W-0
(2)
(2)
(2)
TXB0IE
B0IE
R/W-0
R/W-0
(2)
(1)
(2)
(2)
x = Bit is unknown
x = Bit is unknown
RXB1IE
(2)
R/W-0
U-0
—
(1)
DS39977C-page 441
(2)
RXB0IE
R/W-0
U-0
—
bit 0
bit 0
(2)
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