PIC18F26K80-I/ML Microchip Technology Inc., PIC18F26K80-I/ML Datasheet - Page 284
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PIC18F26K80-I/ML
Manufacturer Part Number
PIC18F26K80-I/ML
Description
28 QFN-S 6X6MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F26K80-I/ML
A/d Inputs
8-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
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PIC18F66K80 FAMILY
FIGURE 20-11:
20.4.3
When any PWM mode is used, the application
hardware must use the proper external pull-up and/or
pull-down resistors on the PWM output pins.
The CCP1M<1:0> bits of the CCP1CON register allow
the user to choose whether the PWM output signals are
active-high or active-low for each pair of PWM output
pins (P1A/P1C and P1B/P1D). The PWM output
polarities must be selected before the PWM pin output
drivers are enabled. Changing the polarity configura-
tion while the PWM pin output drivers are enabled is
not recommended since it may result in damage to the
application circuits.
The P1A, P1B, P1C and P1D output latches may not be
in the proper states when the PWM module is
initialized. Enabling the PWM pin output drivers at the
same time as the Enhanced PWM modes may cause
DS39977C-page 284
Note:
Note 1: All signals are shown as active-high.
Shoot-Through Current
START-UP CONSIDERATIONS
When the microcontroller is released from
Reset, all of the I/O pins are in the
high-impedance
circuits must keep the power switch
devices in the OFF state until the micro-
controller drives the I/O pins with the
proper signal levels or activates the PWM
output(s).
External Switch C
External Switch D
2: T
3: T
ON
OFF
Potential
is the turn-on delay of power switch, QC, and its driver.
is the turn-off delay of power switch, QD, and its driver.
EXAMPLE OF PWM DIRECTION CHANGE AT NEAR 100% DUTY CYCLE
P1C
P1D
P1A
P1B
state.
The
Forward Period
external
PW
Preliminary
damage to the application circuit. The Enhanced PWM
modes must be enabled in the proper Output mode and
complete a full PWM cycle before enabling the PWM
pin output drivers. The completion of a full PWM cycle
is indicated by the TMR2IF or TMR4IF bit of the PIR1
or PIR4 register being set as the second PWM period
begins.
20.4.4
The PWM mode supports an Auto-Shutdown mode that
will disable the PWM outputs when an external
shutdown event occurs. Auto-Shutdown mode places
the PWM output pins into a predetermined state. This
mode is used to help prevent the PWM from damaging
the application.
The auto-shutdown sources are selected using the
ECCP1AS<2:0> bits (ECCP1AS<6:4>). A shutdown
event may be generated by:
• A logic ‘ 0 ’ on the pin that is assigned the FLT0
• Comparator C1
• Comparator C2
• Setting the ECCP1ASE bit in firmware
input function
t1
ENHANCED PWM
AUTO-SHUTDOWN MODE
T
ON
Reverse Period
T
T = T
OFF
2011 Microchip Technology Inc.
OFF
PW
– T
ON
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