UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 186

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UPD78F0034BGC-8BS-A

Manufacturer Part Number
UPD78F0034BGC-8BS-A
Description
MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0034BGC-8BS-A

Package
64LQFP
Family Name
78K0
Maximum Speed
12 MHz
Ram Size
1 KB
Program Memory Size
32 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
51
Interface Type
3-Wire/UART
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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184
(1) 16-bit timer counter 0 (TM0)
(2) 16-bit timer capture/compare register 00 (CR00)
TM0 is a 16-bit read-only register that counts count pulses.
The counter is incremented in synchronization with the rising edge of the count clock. If the count value is read
during operation, input of the count clock is temporarily stopped, and the count value at that point is read. The
count value is reset to 0000H in the following cases.
<1> At RESET input
<2> If TMC03 and TMC02 are cleared
<3> If the valid edge of TI00 is input in the clear & start mode entered by inputting the valid edge of TI00
<4> If TM0 and CR00 match in the clear & start mode entered on a match between TM0 and CR00
CR00 is a 16-bit register which has the functions of both a capture register and a compare register. Whether
it is used as a capture register or as a compare register is set by bit 0 (CRC00) of capture/compare control register
0 (CRC0).
• When CR00 is used as a compare register
• When CR00 is used as a capture register
The value set in CR00 is constantly compared with the 16-bit timer counter 0 (TM0) count value, and an interrupt
request (INTTM00) is generated if they match. It can also be used as the register that holds the interval time
then TM0 is set to interval timer operation.
It is possible to select the valid edge of the TI00 pin or the TI01 pin as the capture trigger. Setting of the TI00
or TI01 valid edge is performed by means of prescaler mode register 0 (PRM0) (see Table 8-2).
Remarks 1. Setting ES01, ES00 = 1, 0 and ES11, ES10 = 1, 0 is prohibited.
Falling edge
Rising edge
No capture operation
Falling edge
Rising edge
Both rising and falling edges
(1) TI00 pin valid edge selected as capture trigger (CRC01 = 1, CRC00 = 1)
(2) TI01 pin valid edge selected as capture trigger (CRC01 = 0, CRC00 = 1)
CR00 Capture Trigger
CR00 Capture Trigger
Table 8-2. CR00 Capture Trigger and Valid Edges of TI00 and TI01 Pins
2. ES01, ES00:
ES11, ES10:
CRC01, CRC00: Bits 1 and 0 of capture/compare control register 0 (CRC0)
CHAPTER 8 16-BIT TIMER/EVENT COUNTER 0
Bits 5 and 4 of prescaler mode register 0 (PRM0)
Bits 7 and 6 of prescaler mode register 0 (PRM0)
User’s Manual U14046EJ5V0UD
Rising edge
Falling edge
Both rising and falling edges
Falling edge
Rising edge
Both rising and falling edges
TI00 Pin Valid Edge
TI01 Pin Valid Edge
ES01
ES11
0
0
1
0
0
1
ES00
ES10
1
0
1
0
1
1

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