UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 217

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

(5) Operation of OVF0 flag
(6) Conflicting operations
(7) Timer operation
<1> The OVF0 flag is also set to 1 in the following case.
<2> Even if the OVF0 flag is cleared before the next count clock is counted (before TM0 becomes 0001H) after
<1> Even if 16-bit timer counter 0 (TM0) is read, the value is not captured by 16-bit timer capture/compare
<2> Regardless of the CPU’s operation mode, when the timer stops, the signals input to pins TI00/TI01 are
When the 16-bit timer capture/compare register (CR00/CR01) is used as a compare register, if the write period
and the match timing of 16-bit timer counter 0 (TM0) conflict, match determination is not successfully done. Do
not perform a write operation of CR00/CR01 near the match timing.
Either of the clear & start mode entered on a match between TM0 and CR00, clear & start at the valid edge
of TI00, or free-running mode is selected.
When TM0 is counted up from FFFFH to 0000H.
the occurrence of a TM0 overflow, the OVF0 flag is reset newly and clear is disabled.
register 01 (CR01).
not acknowledged.
CR00 is set to FFFFH.
Count clock
INTTM00
CHAPTER 8 16-BIT TIMER/EVENT COUNTER 0
CR00
OVF0
Figure 8-30. Operation Timing of OVF0 Flag
TM0
FFFEH
User’s Manual U14046EJ5V0UD
FFFFH
FFFFH
0000H
0001H
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