UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 231

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UPD78F0034BGC-8BS-A

Manufacturer Part Number
UPD78F0034BGC-8BS-A
Description
MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0034BGC-8BS-A

Package
64LQFP
Family Name
78K0
Maximum Speed
12 MHz
Ram Size
1 KB
Program Memory Size
32 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
51
Interface Type
3-Wire/UART
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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9.4.2 External event counter operation
5n (TM5n).
the rising or falling edge can be selected.
and an interrupt request signal (INTTM5n) is generated.
The external event counter counts the number of external clock pulses to be input to TI5n using 8-bit timer counter
TM5n is incremented each time the valid edge specified by timer clock select register 5n (TCL5n) is input. Either
When the TM5n count value matches the value of 8-bit timer compare register 5n (CR5n), TM5n is cleared to 0
Whenever the TM5n count value matches the value of CR5n, INTTM5n is generated.
[Setting]
<1> Set each register
<2> When TCE5n = 1 is set, the number of pulses input from TI5n is counted.
<3> When the values of TM5n and CR5n match, INTTM5n is generated (TM5n is cleared to 00H).
<4> Each time the values of TM5n and CR5n match, INTTM5n is generated.
Remarks 1. N = 00H to FFH
TM5n count value
• TCL5n: Edge selection of TI5n input
• CR5n: Compare value
• TMC5n: Count operation stop, clear & start mode on match between TM5n and CR5n, timer F/F inverted
INTTM5n
Figure 9-9. External Event Counter Operation Timing (with Rising Edge Specified)
2. n = 0, 1
CR5n
TI5n
Falling edge of TI5n
Rising edge of TI5n
operation disable, timer output disable
(TMC5n = 0000
00H
CHAPTER 9 8-BIT TIMER/EVENT COUNTERS 50, 51
01H
02H
00B,
03H
TCL5n = 01H
TCL5n = 00H
User’s Manual U14046EJ5V0UD
= don’t care)
04H
05H
N
1
N
N
00H
01H
02H
03H
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