UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 376

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UPD78F0034BGC-8BS-A

Manufacturer Part Number
UPD78F0034BGC-8BS-A
Description
MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0034BGC-8BS-A

Package
64LQFP
Family Name
78K0
Maximum Speed
12 MHz
Ram Size
1 KB
Program Memory Size
32 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
51
Interface Type
3-Wire/UART
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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374
An example of the processing procedure of the slave with the INTIIC0 interrupt is explained below (processing
is performed assuming that no extension code is used).
The INTIIC0 interrupt checks the status, and the following operations are performed.
<1> Communication is stopped if the stop condition is issued.
<2> If the start condition is issued, the address is checked and communication is completed if the address does
<3> For data transmit/receive, only the ready flag is set. Processing returns from the interrupt with the IIC0 bus
Remark <1> to <3> above correspond to <1> to <3> in Figure 18-22 Slave Operation Flowchart (2/2).
not match. If the address matches, the communication mode is set, wait is cancelled, and processing returns
from the interrupt (the ready flag is cleared).
remaining in the wait status.
CHAPTER 18 SERIAL INTERFACE IIC0 ( PD780024AY, 780034AY SUBSERIES ONLY)
Complete interrupt servicing.
Complete interrupt servicing.
Clear communication
Generate
End processing
Set ready flag
LREL0 = 1
mode flag.
SPD0 = 1
STD0 = 1
Figure 18-22. Slave Operation Flowchart (2/2)
No
No
<3>
INTIIC0
User’s Manual U14046EJ5V0UD
Yes
Yes
<1>
<2>
Set communication mode flag
Complete interrupt servicing.
Communication direction
and clear ready flag.
flag
COI0 = 1?
TRC0
Yes
No

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