UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 353

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UPD78F0034BGC-8BS-A

Manufacturer Part Number
UPD78F0034BGC-8BS-A
Description
MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0034BGC-8BS-A

Package
64LQFP
Family Name
78K0
Maximum Speed
12 MHz
Ram Size
1 KB
Program Memory Size
32 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
51
Interface Type
3-Wire/UART
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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RENESAS
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(3) IIC transfer clock select register 0 (IICCL0)
Address: FFAAH After reset: 00H
Symbol
IICCL0
Note Bits 4 and 5 are read-only bits.
This register is used to set the transfer clock for the I
IICCL0 is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears IICCL0 to 00H.
Remark IICE0: Bit 7 of IIC control register 0 (IICC0)
Condition for clearing (CLD0 = 0)
• When the SCL0 line is at low level
• When IICE0 = 0 (operation stop)
• When RESET is input
Condition for clearing (DAD0 = 0)
• When the SDA0 line is at low level
• When IICE0 = 0 (operation stop)
• When RESET is input
Condition for clearing (SMC0 = 0)
• Cleared by instruction
• When RESET is input
DAD0
SMC0
CLD0
CHAPTER 18 SERIAL INTERFACE IIC0 ( PD780024AY, 780034AY SUBSERIES ONLY)
7
0
0
1
0
1
0
1
Figure 18-7. Format of IIC Transfer Clock Select Register 0 (IICCL0) (1/2)
SCL0 line was detected at low level.
SCL0 line was detected at high level.
SDA0 line was detected at low level.
SDA0 line was detected at high level.
Operation in standard mode
Operation in high-speed mode
6
0
R/W
CLD0
<5>
Note
Detection of SDA0 line level (valid only when IICE0 = 1)
Detection of SCL0 line level (valid only when IICE0 = 1)
User’s Manual U14046EJ5V0UD
DAD0
<4>
Operation mode switching
2
SMC0
C bus.
3
Condition for setting (CLD0 = 1)
• When the SCL0 line is at high level
Condition for setting (DAD0 = 1)
• When the SDA0 line is at high level
Condition for setting (SMC0 = 1)
• Set by instruction
DFC0
2
1
0
CL00
0
351

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