UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 374

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

(2) Slave operation
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The processing procedure of the slave operation is as follows.
Basically, the slave operation is event-driven. Therefore, processing by the INTIIC0 interrupt (processing that
must substantially change the operation status such as detection of a stop condition during communication) is
necessary.
In the following explanation, it is assumed that the extension code is not supported for data communication. It
is also assumed that the INTIIC0 interrupt servicing only performs status transition processing, and that actual
data communication is performed by the main processing.
Therefore, data communication processing is performed by preparing the following three flags and passing them
to the main processing instead of INTIIC0.
<1> Communication mode flag
<2> Ready flag
<3> Communication direction flag
This flag indicates the following two communication statuses.
This flag indicates that data communication is enabled. Its function is the same as the INTIIC0 interrupt
for ordinary data communication. This flag is set by interrupt servicing and cleared by the main processing.
Clear this flag by interrupt servicing when communication is started. However, the ready flag is not set by
interrupt servicing when the first data is transmitted. Therefore, the first data is transmitted without the flag
being cleared (an address match is interpreted as a request for the next data).
This flag indicates the direction of communication. Its value is the same as TRC0.
Clear mode:
Communication mode: Status in which data communication is performed (from valid address detection
CHAPTER 18 SERIAL INTERFACE IIC0 ( PD780024AY, 780034AY SUBSERIES ONLY)
IIC0
INTIIC0
Setting
Status in which data communication is not performed
to stop condition detection, no detection of ACK from master, address mismatch)
User’s Manual U14046EJ5V0UD
Interrupt servicing
Setting
Data
Flag
Main processing