UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 295

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

14.6 A/D Converter Cautions
(1) Power consumption in standby mode
(2) Input range of ANI0 to ANI7
(3) Contending operations
(4) ANI0/P10 to ANI7/P17
<1> Contention between A/D conversion result register 0 (ADCR0) write and ADCR0 read by instruction upon
<2> Contention between ADCR0 write and external trigger signal input upon the end of conversion
<3> Contention between ADCR0 write and A/D converter mode register 0 (ADM0) write or analog input channel
<1> The analog input pins (ANI0 to ANI7) also function as input port pins (P10 to P17).
<2> If digital pulses are applied to the pin adjacent to a pin in the process of A/D conversion, the expected
A/D converter stops operating in the standby mode. At this time, power consumption can be reduced by stopping
the conversion operation (by clearing bit 7 (ADCS0) of A/D converter mode register 0 (ADM0) to 0).
Figure 14-15 shows the circuit configuration of a series resistor string.
The input voltages of ANI0 to ANI7 should be within the specification range. In particular, if a voltage higher
than AV
of that channel will be undefined and the conversion values of other channels may also be affected.
the end of conversion
ADCR0 read is given priority. After the read operation, the new conversion result is written to ADCR0.
The external trigger signal is not accepted during A/D conversion. Therefore, the external trigger signal
is not accepted during ADCR0 write.
specification register 0 (ADS0) write upon the end of conversion
ADM0 or ADS0 write is given priority. ADCR0 write is not performed, nor is the conversion end interrupt
request signal (INTAD0) generated.
When A/D conversion is performed with any of pins ANI0 to ANI7 selected, do not access port 1 while
conversion is in progress, as this may reduce the conversion resolution.
A/D conversion value may not be obtainable due to coupling noise. Therefore, avoid applying pulses to
the pin adjacent to a pin undergoing A/D conversion.
REF
or lower than AV
CHAPTER 14 10-BIT A/D CONVERTER ( PD780034A, 780034AY SUBSERIES)
Figure 14-15. Circuit Configuration of Series Resistor String
AV
AV
SS
REF
SS
is input (even if within the absolute maximum rating range), the conversion value
User’s Manual U14046EJ5V0UD
P-ch
Series resistor string
ADCS0
293