UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 360

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

18.5.6
to transmit or receive data (i.e., is in a wait state).
canceled for both the master and slave devices, the next data transfer can begin.
358
The wait signal (WAIT) is used to notify the communication partner that a device (master or slave) is preparing
Setting the SCL0 pin to low level notifies the communication partner of the wait status. When wait status has been
Transfer lines
Wait signal (WAIT)
Master
(1) When master device has a nine-clock wait and slave device has an eight-clock wait
Slave
CHAPTER 18 SERIAL INTERFACE IIC0 ( PD780024AY, 780034AY SUBSERIES ONLY)
ACKE0
SDA0
SCL0
SCL0
SCL0
IIC0
IIC0
(master transmits, slave receives, and ACKE0 = 1)
H
D2
6
6
Master returns to high
impedance but slave
is in wait state (low level).
Figure 18-16. Wait Signal (1/2)
Wait after output
of eighth clock
D1
User’s Manual U14046EJ5V0UD
7
7
D0
8
8
Wait signal
from slave
9
ACK
Wait after output
of ninth clock
9
FFH is written to IIC0 or WREL0 is set to 1
Wait signal
from master
IIC0 data write (cancel wait)
D7
1
1
D6
2
2
D5
3
3