AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 125

• Manufacturer Part Number: AT89C5132
• Manufacturer: Atmel Corporation

Specifications of AT89C5132

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-12C
• Max I/o Pins: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Uart: 1
• Adc Channels: 2
• Adc Resolution (bits): 10
• Adc Speed (ksps): 22.7
• Sram (kbytes): 2.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 3.6
• Timers: 2
• Isp: UART/USB
• Watchdog: Yes

19.3.1
19.3.2
19.3.3
19.3.4
4173E–USB–09/07
Master Configuration
Slave Configuration
Data Exchange
Master Mode with Polling Policy
The SPI operates in master mode when the MSTR bit in SPCON is set.
The SPI operates in slave mode when the MSTR bit in SPCON is cleared and data has been
loaded in SPDAT.
There are two possible Policies to exchange data in master and slave modes:
•
•
Figure 19-9 shows the initialization phase and the transfer phase flows using the polling policy.
Using this flow prevents any overrun error occurrence.
•
•
•
•
This policy provides the fastest effective transmission and is well adapted when communicating
at high speed with other Microcontrollers. However, the procedure may then be interrupted at
any time by higher priority tasks.
polling
interrupts
The bit rate is selected according to Table 97.
The transfer format depends on the slave peripheral.
SS may be deasserted between transfers depending also on the slave peripheral.
SPIF flag is cleared when reading SPDAT (SPSTA has been read before by the “end of
transfer” check).
AT89C5132
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