AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 126
AT89C5132
Manufacturer Part Number
AT89C5132
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5132.pdf
(3 pages)
2.AT89C5132.pdf
(182 pages)
3.AT89C5132.pdf
(38 pages)
4.AT89C5132.pdf
(33 pages)
Specifications of AT89C5132
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-12C
Max I/o Pins
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Uart
1
Adc Channels
2
Adc Resolution (bits)
10
Adc Speed (ksps)
22.7
Sram (kbytes)
2.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 3.6
Timers
2
Isp
UART/USB
Watchdog
Yes
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Figure 19-9. Master SPI Polling Policy Flows
19.3.5
126
AT89C5132
Master Mode with Interrupt Policy
Figure 19-10 shows the initialization phase and the transfer phase flows using the interrupt pol-
icy. Using this flow prevents any overrun error occurrence.
•
•
•
Reading SPSTA at the beginning of the ISR is mandatory for clearing the SPIF flag. Clear is
effective when reading SPDAT.
The bit rate is selected according to Table 97.
The transfer format depends on the slave peripheral.
SS may be deasserted between transfers depending also on the slave peripheral.
program CPOL & CPHA
Select Master Mode
SPI Initialization
Disable Interrupt
Polling Policy
program SPR2:0
Select Bit Rate
Select Format
Enable SPI
MSTR = 1
SPEN = 1
SPIE = 0
Write Data in SPDAT
Get Data Received
End Of Transfer?
Polling Policy
Deselect Slave
Last Transfer?
SPI Transfer
Start Transfer
Read SPDAT
Select Slave
SPIF = 1?
Pn.x = H
Pn.x = L
4173E–USB–09/07
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